| Message ID | 20230411135558.44282-9-xingyu.wu@starfivetech.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add new partial clock and reset drivers for StarFive JH7110 | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Failed to apply to next/pending-fixes or riscv/for-next |
diff --git a/MAINTAINERS b/MAINTAINERS index 4c0b39c44957..5f9c544bc189 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19914,6 +19914,7 @@ F: drivers/mmc/host/dw_mmc-starfive.c STARFIVE JH71X0 CLOCK DRIVERS M: Emil Renner Berthing <kernel@esmil.dk> M: Hal Feng <hal.feng@starfivetech.com> +M: Xingyu Wu <xingyu.wu@starfivetech.com> S: Maintained F: Documentation/devicetree/bindings/clock/starfive,jh71*.yaml F: drivers/clk/starfive/clk-starfive-jh71*
Add a new maintainer which is in charge of StarFive JH7110 STG/ISP/VOUT clock drivers. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+)