diff mbox series

[RFC,48/48] drivers/hvc: sbi: Disable HVC console for TVMs

Message ID	20230419221716.3603068-49-atishp@rivosinc.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Atish Patra <atishp@rivosinc.com> To: linux-kernel@vger.kernel.org Cc: Atish Patra <atishp@rivosinc.com>, Alexandre Ghiti <alex@ghiti.fr>, Andrew Jones <ajones@ventanamicro.com>, Andrew Morton <akpm@linux-foundation.org>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn@rivosinc.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>, Sean Christopherson <seanjc@google.com>, linux-coco@lists.linux.dev, Dylan Reid <dylan@rivosinc.com>, abrestic@rivosinc.com, Samuel Ortiz <sameo@rivosinc.com>, Christoph Hellwig <hch@infradead.org>, Conor Dooley <conor.dooley@microchip.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Guo Ren <guoren@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Jiri Slaby <jirislaby@kernel.org>, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, Mayuresh Chitale <mchitale@ventanamicro.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paolo Bonzini <pbonzini@redhat.com>, Paul Walmsley <paul.walmsley@sifive.com>, Rajnesh Kanwal <rkanwal@rivosinc.com>, Uladzislau Rezki <urezki@gmail.com> Subject: [RFC 48/48] drivers/hvc: sbi: Disable HVC console for TVMs Date: Wed, 19 Apr 2023 15:17:16 -0700 Message-Id: <20230419221716.3603068-49-atishp@rivosinc.com> In-Reply-To: <20230419221716.3603068-1-atishp@rivosinc.com> References: <20230419221716.3603068-1-atishp@rivosinc.com> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	RISC-V CoVE support \| expand [RFC,00/48] RISC-V CoVE support [RFC,01/48] mm/vmalloc: Introduce arch hooks to notify ioremap/unmap changes [RFC,02/48] RISC-V: KVM: Improve KVM error reporting to the user space [RFC,03/48] RISC-V: KVM: Invoke aia_update with preempt disabled/irq enabled [RFC,04/48] RISC-V: KVM: Add a helper function to get pgd size [RFC,05/48] RISC-V: Add COVH SBI extensions definitions [RFC,06/48] RISC-V: KVM: Implement COVH SBI extension [RFC,07/48] RISC-V: KVM: Add a barebone CoVE implementation [RFC,08/48] RISC-V: KVM: Add UABI to support static memory region attestation [RFC,09/48] RISC-V: KVM: Add CoVE related nacl helpers [RFC,10/48] RISC-V: KVM: Implement static memory region measurement [RFC,11/48] RISC-V: KVM: Use the new VM IOCTL for measuring pages [RFC,12/48] RISC-V: KVM: Exit to the user space for trap redirection [RFC,13/48] RISC-V: KVM: Return early for gstage modifications [RFC,14/48] RISC-V: KVM: Skip dirty logging updates for TVM [RFC,15/48] RISC-V: KVM: Add a helper function to trigger fence ops [RFC,16/48] RISC-V: KVM: Skip most VCPU requests for TVMs [RFC,17/48] RISC-V : KVM: Skip vmid/hgatp management for TVMs [RFC,18/48] RISC-V: KVM: Skip TLB management for TVMs [RFC,19/48] RISC-V: KVM: Register memory regions as confidential for TVMs [RFC,20/48] RISC-V: KVM: Add gstage mapping for TVMs [RFC,21/48] RISC-V: KVM: Handle SBI call forward from the TSM [RFC,22/48] RISC-V: KVM: Implement vcpu load/put functions for CoVE guests [RFC,23/48] RISC-V: KVM: Wireup TVM world switch [RFC,24/48] RISC-V: KVM: Update timer functionality for TVMs. [RFC,25/48] RISC-V: KVM: Skip HVIP update for TVMs [RFC,26/48] RISC-V: Add COVI extension definitions [RFC,27/48] RISC-V: KVM: Implement COVI SBI extension [RFC,28/48] RISC-V: KVM: Add interrupt management functions for TVM [RFC,29/48] RISC-V: KVM: Skip AIA CSR updates for TVMs [RFC,30/48] RISC-V: KVM: Perform limited operations in hardware enable/disable [RFC,31/48] RISC-V: KVM: Indicate no support user space emulated IRQCHIP [RFC,32/48] RISC-V: KVM: Add AIA support for TVMs [RFC,33/48] RISC-V: KVM: Hookup TVM VCPU init/destroy [RFC,34/48] RISC-V: KVM: Initialize CoVE [RFC,35/48] RISC-V: KVM: Add TVM init/destroy calls [RFC,36/48] RISC-V: KVM: Read/write gprs from/to shmem in case of TVM VCPU. [RFC,37/48] RISC-V: Add COVG SBI extension definitions [RFC,38/48] RISC-V: Add CoVE guest config and helper functions [RFC,39/48] RISC-V: Implement COVG SBI extension [RFC,40/48] RISC-V: COVE: Add COVH invalidate, validate, promote, demote and remove APIs. [RFC,41/48] RISC-V: KVM: Add host side support to handle COVG SBI calls. [RFC,42/48] RISC-V: Allow host to inject any ext interrupt id to a CoVE guest. [RFC,43/48] RISC-V: Add base memory encryption functions. [RFC,44/48] RISC-V: Add cc_platform_has() for RISC-V for CoVE [RFC,45/48] RISC-V: ioremap: Implement for arch specific ioremap hooks [RFC,46/48] riscv/virtio: Have CoVE guests enforce restricted virtio memory access. [RFC,47/48] RISC-V: Add shared bounce buffer to support DBCN for CoVE Guest. [RFC,48/48] drivers/hvc: sbi: Disable HVC console for TVMs

Checks

Context	Check	Description
conchuod/tree_selection	fail	Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Atish Kumar Patra April 19, 2023, 10:17 p.m. UTC

If two same type of console is used in command line, kernel
picks up the first registered one instead of the preferred one.
The fix was proposed and NACK'ed due to a possible regression
for other users.

https://lore.kernel.org/all/Y+tziG0Uo5ey+Ocy@alley/

HVC sbi console makes it impossible to use virtio console
which is preferred anyways. We could have disabled HVC console
for TVMs but same kernel image must work on both host and the
the guest. There are genuine reasons for requiring the hvc sbi
cosnole for the host.

Do not initialize the hvc console for the TVMs so that virtio
console can be used.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 drivers/tty/hvc/hvc_riscv_sbi.c | 5 +++++
 1 file changed, 5 insertions(+)

diff mbox series

Patch

diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 83cfe00..dee96c5 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -11,6 +11,7 @@ 
 #include <linux/moduleparam.h>
 #include <linux/types.h>
 
+#include <asm/cove.h>
 #include <asm/sbi.h>
 
 #include "hvc_console.h"
@@ -103,6 +104,10 @@  static int __init hvc_sbi_init(void)
 {
 	int err;
 
+	/* Prefer virtio console as hvc console for guests */
+	if (is_cove_guest())
+		return 0;
+
 	if ((sbi_spec_version >= sbi_mk_version(1, 0)) &&
 	    (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
 		err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 16));