Message ID | 20230621072234.9900-2-alexghiti@rivosinc.com (mailing list archive) |
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State | Superseded |
Headers | show |
Series | [v2,1/3] Documentation: arm: Add bootargs to the table of added DT parameters | expand |
Context | Check | Description |
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conchuod/cover_letter | warning | Series does not have a cover letter |
conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 4681dacadeef |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 6 and now 6 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 8 this patch: 8 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 8 this patch: 8 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 20 this patch: 20 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | warning | WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | No Fixes tag |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
在 2023/6/21 15:22, Alexandre Ghiti 写道: > This document describes the constraints and requirements of the early > boot process in a RISC-V kernel. > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > --- > Documentation/riscv/boot-image-header.rst | 3 - > Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ > Documentation/riscv/index.rst | 1 + > 3 files changed, 171 insertions(+), 3 deletions(-) > create mode 100644 Documentation/riscv/boot.rst > > diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst > index d7752533865f..a4a45310c4c4 100644 > --- a/Documentation/riscv/boot-image-header.rst > +++ b/Documentation/riscv/boot-image-header.rst > @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux > > This document only describes the boot image header details for RISC-V Linux. > > -TODO: > - Write a complete booting guide. > - > The following 64-byte header is present in decompressed Linux kernel image:: > > u32 code0; /* Executable code */ > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst > new file mode 100644 > index 000000000000..019ee818686d > --- /dev/null > +++ b/Documentation/riscv/boot.rst > @@ -0,0 +1,170 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +=============================================== > +RISC-V Kernel Boot Requirements and Constraints > +=============================================== > + > +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> > +:Date: 23 May 2023 > + > +This document describes what the RISC-V kernel expects from bootloaders and > +firmware, but also the constraints that any developer must have in mind when > +touching the early boot process. For the purposes of this document, the > +'early boot process' refers to any code that runs before the final virtual > +mapping is set up. > + > +Pre-kernel Requirements and Constraints > +======================================= > + > +The RISC-V kernel expects the following of bootloaders and platform firmware: > + > +Register state > +-------------- > + > +The RISC-V kernel expects: > + > + * `$a0` to contain the hartid of the current core. > + * `$a1` to contain the address of the devicetree in memory. > + > +CSR state > +--------- > + > +The RISC-V kernel expects: > + > + * `$satp = 0`: the MMU, if present, must be disabled. > + > +Reserved memory for resident firmware > +------------------------------------- > + > +The RISC-V kernel must not map any resident memory, or memory protected with > +PMPs, in the direct mapping, so the firmware must correctly mark those regions > +as per the devicetree specification and/or the UEFI specification. > + > +Kernel location > +--------------- > + > +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 > +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the > +kernel if that's not the case. > + > +Hardware description > +-------------------- > + > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > + > +The devicetree is either passed directly to the kernel from the previous stage > +using the `$a1` register, or when booting with UEFI, it can be passed using the > +EFI configuration table. > + > +The ACPI tables are passed to the kernel using the EFI configuration table. In > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > +"EFI stub and devicetree" tree section below for details about this devicetree. > + > +Kernel entrance > +--------------- > + > +On SMP systems, there are 2 methods to enter the kernel: > + > +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart > + wins a lottery and executes the early boot code while the other harts are > + parked waiting for the initialization to finish. This method is mostly used to > + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. > +- `Ordered booting`: the firmware releases only one hart that will execute the > + initialization phase and then will start all other harts using the SBI HSM > + extension. The ordered booting method is the preferred booting method for > + booting the RISC-V kernel because it can support cpu hotplug and kexec. > + > +UEFI > +---- > + > +UEFI memory map > +~~~~~~~~~~~~~~~ > + > +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to > +populate the system memory. > + > +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree > +node and abide by the devicetree specification to convert the attributes of > +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent > +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree > +specification v0.4-rc1). append this note ? Note that RISC-V edk2 diverges from the devicetree specification to declare the !no-map regions as EfiReservedMemoryType instead of EfiBootServicesData. > + > +RISCV_EFI_BOOT_PROTOCOL > +~~~~~~~~~~~~~~~~~~~~~~~ > + > +When booting with UEFI, the EFI stub requires the boot hartid in order to pass > +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using > +one of the following methods: > + > +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). > +- `boot-hartid` devicetree subnode (**deprecated**). > + > +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree > +based approach is deprecated now. > + > +Early Boot Requirements and Constraints > +======================================= > + > +The RISC-V kernel's early boot process operates under the following constraints: > + > +EFI stub and devicetree > +----------------------- > + > +When booting with UEFI, the devicetree is supplemented (or created) by the EFI > +stub with the same parameters as arm64 which are described at the paragraph > +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. > + > +Virtual mapping installation > +---------------------------- > + > +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: > + > +1. :c:func:`setup_vm` installs a temporary kernel mapping in > + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the > + kernel text/data are mapped at this point. When establishing this mapping, no > + allocation can be done (since the system memory is not known yet), so > + :c:var:`early_pg_dir` page table is statically allocated (using only one > + table for each level). > + > +2. :c:func:`setup_vm_final` creates the final kernel mapping in > + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory > + to create the linear mapping. When establishing this mapping, the kernel > + can allocate memory but cannot access it directly (since the direct mapping > + is not present yet), so it uses temporary mappings in the fixmap region to > + be able to access the newly allocated page table levels. > + > +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly > +convert direct mapping addresses to physical addresses, they need to know the > +start of the DRAM. This happens after step 1, right before step 2 installs the > +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). > +Any usage of those macros before the final virtual mapping is installed must > +be carefully examined. > + > +Device-tree mapping via fixmap > +------------------------------ > + > +The RISC-V kernel uses the fixmap region to map the devicetree because the > +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and > +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is > +initialized with virtual addresses established by :c:func:`setup_vm` and used > +with the mapping established by :c:func:`setup_vm_final`. > + > +Pre-MMU execution > +----------------- > + > +A few pieces of code need to run before even the first virtual mapping is > +established. These are the installation of the first virtual mapping itself, > +patching of early alternatives and the early parsing of the kernel command line. > +That code must be very carefully compiled as: > + > +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since > + otherwise, any access to a global symbol would go through the GOT which is > + only relocated virtually. > +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid > + any relocations to happen before the MMU is setup. > +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and > + others). > + > +As using a symbol from a different compilation unit requires this unit to be > +compiled with those flags, we advise, as much as possible, not to use external > +symbols. > diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst > index 175a91db0200..1f66062def6d 100644 > --- a/Documentation/riscv/index.rst > +++ b/Documentation/riscv/index.rst > @@ -5,6 +5,7 @@ RISC-V architecture > .. toctree:: > :maxdepth: 1 > > + boot > boot-image-header > vm-layout > hwprobe
On Wed, Jun 21, 2023 at 04:15:07PM +0800, Song Shuai wrote: > > > 在 2023/6/21 15:22, Alexandre Ghiti 写道: > > This document describes the constraints and requirements of the early > > boot process in a RISC-V kernel. > > > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > > --- > > Documentation/riscv/boot-image-header.rst | 3 - > > Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ > > Documentation/riscv/index.rst | 1 + > > 3 files changed, 171 insertions(+), 3 deletions(-) > > create mode 100644 Documentation/riscv/boot.rst > > > > diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst > > index d7752533865f..a4a45310c4c4 100644 > > --- a/Documentation/riscv/boot-image-header.rst > > +++ b/Documentation/riscv/boot-image-header.rst > > @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux > > This document only describes the boot image header details for RISC-V Linux. > > -TODO: > > - Write a complete booting guide. > > - > > The following 64-byte header is present in decompressed Linux kernel image:: > > u32 code0; /* Executable code */ > > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst > > new file mode 100644 > > index 000000000000..019ee818686d > > --- /dev/null > > +++ b/Documentation/riscv/boot.rst > > @@ -0,0 +1,170 @@ > > +.. SPDX-License-Identifier: GPL-2.0 > > + > > +=============================================== > > +RISC-V Kernel Boot Requirements and Constraints > > +=============================================== > > + > > +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> > > +:Date: 23 May 2023 > > + > > +This document describes what the RISC-V kernel expects from bootloaders and > > +firmware, but also the constraints that any developer must have in mind when > > +touching the early boot process. For the purposes of this document, the > > +'early boot process' refers to any code that runs before the final virtual > > +mapping is set up. > > + > > +Pre-kernel Requirements and Constraints > > +======================================= > > + > > +The RISC-V kernel expects the following of bootloaders and platform firmware: > > + > > +Register state > > +-------------- > > + > > +The RISC-V kernel expects: > > + > > + * `$a0` to contain the hartid of the current core. > > + * `$a1` to contain the address of the devicetree in memory. > > + > > +CSR state > > +--------- > > + > > +The RISC-V kernel expects: > > + > > + * `$satp = 0`: the MMU, if present, must be disabled. > > + > > +Reserved memory for resident firmware > > +------------------------------------- > > + > > +The RISC-V kernel must not map any resident memory, or memory protected with > > +PMPs, in the direct mapping, so the firmware must correctly mark those regions > > +as per the devicetree specification and/or the UEFI specification. > > + > > +Kernel location > > +--------------- > > + > > +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 > > +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the > > +kernel if that's not the case. > > + > > +Hardware description > > +-------------------- > > + > > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > > + > > +The devicetree is either passed directly to the kernel from the previous stage > > +using the `$a1` register, or when booting with UEFI, it can be passed using the > > +EFI configuration table. > > + > > +The ACPI tables are passed to the kernel using the EFI configuration table. In > > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > > +"EFI stub and devicetree" tree section below for details about this devicetree. > > + > > +Kernel entrance > > +--------------- > > + > > +On SMP systems, there are 2 methods to enter the kernel: > > + > > +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart > > + wins a lottery and executes the early boot code while the other harts are > > + parked waiting for the initialization to finish. This method is mostly used to > > + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. > > +- `Ordered booting`: the firmware releases only one hart that will execute the > > + initialization phase and then will start all other harts using the SBI HSM > > + extension. The ordered booting method is the preferred booting method for > > + booting the RISC-V kernel because it can support cpu hotplug and kexec. > > + > > +UEFI > > +---- > > + > > +UEFI memory map > > +~~~~~~~~~~~~~~~ > > + > > +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to > > +populate the system memory. > > + > > +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree > > +node and abide by the devicetree specification to convert the attributes of > > +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent > > +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree > > +specification v0.4-rc1). > append this note ? > > Note that RISC-V edk2 diverges from the devicetree specification to declare > the !no-map regions as EfiReservedMemoryType instead of EfiBootServicesData. > > + Not required. It will be fixed in EDK2.
Hey Alex, On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > This document describes the constraints and requirements of the early > boot process in a RISC-V kernel. Thanks a lot for writing this & implementing the feedback :) I had one or two minor comments about rather long sentences, but there's little point I think in respinning for that, so I have ignored them. Other than that, didn't spot anything new on this second reading. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > This document describes the constraints and requirements of the early > boot process in a RISC-V kernel. > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > --- > Documentation/riscv/boot-image-header.rst | 3 - > Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ > Documentation/riscv/index.rst | 1 + > 3 files changed, 171 insertions(+), 3 deletions(-) > create mode 100644 Documentation/riscv/boot.rst > > diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst > index d7752533865f..a4a45310c4c4 100644 > --- a/Documentation/riscv/boot-image-header.rst > +++ b/Documentation/riscv/boot-image-header.rst > @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux > > This document only describes the boot image header details for RISC-V Linux. > > -TODO: > - Write a complete booting guide. > - > The following 64-byte header is present in decompressed Linux kernel image:: > > u32 code0; /* Executable code */ > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst > new file mode 100644 > index 000000000000..019ee818686d > --- /dev/null > +++ b/Documentation/riscv/boot.rst > @@ -0,0 +1,170 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +=============================================== > +RISC-V Kernel Boot Requirements and Constraints > +=============================================== > + > +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> > +:Date: 23 May 2023 > + > +This document describes what the RISC-V kernel expects from bootloaders and > +firmware, but also the constraints that any developer must have in mind when > +touching the early boot process. For the purposes of this document, the > +'early boot process' refers to any code that runs before the final virtual > +mapping is set up. > + > +Pre-kernel Requirements and Constraints > +======================================= > + > +The RISC-V kernel expects the following of bootloaders and platform firmware: > + > +Register state > +-------------- > + > +The RISC-V kernel expects: > + > + * `$a0` to contain the hartid of the current core. > + * `$a1` to contain the address of the devicetree in memory. > + > +CSR state > +--------- > + > +The RISC-V kernel expects: > + > + * `$satp = 0`: the MMU, if present, must be disabled. > + > +Reserved memory for resident firmware > +------------------------------------- > + > +The RISC-V kernel must not map any resident memory, or memory protected with > +PMPs, in the direct mapping, so the firmware must correctly mark those regions > +as per the devicetree specification and/or the UEFI specification. > + > +Kernel location > +--------------- > + > +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 > +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the > +kernel if that's not the case. > + > +Hardware description > +-------------------- > + > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > + > +The devicetree is either passed directly to the kernel from the previous stage > +using the `$a1` register, or when booting with UEFI, it can be passed using the > +EFI configuration table. > + > +The ACPI tables are passed to the kernel using the EFI configuration table. In > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > +"EFI stub and devicetree" tree section below for details about this devicetree. ^ redundant 'tree' here > + > +Kernel entrance > +--------------- > + > +On SMP systems, there are 2 methods to enter the kernel: > + > +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart > + wins a lottery and executes the early boot code while the other harts are > + parked waiting for the initialization to finish. This method is mostly used to > + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. > +- `Ordered booting`: the firmware releases only one hart that will execute the > + initialization phase and then will start all other harts using the SBI HSM > + extension. The ordered booting method is the preferred booting method for > + booting the RISC-V kernel because it can support cpu hotplug and kexec. > + > +UEFI > +---- > + > +UEFI memory map > +~~~~~~~~~~~~~~~ > + > +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to > +populate the system memory. > + > +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree > +node and abide by the devicetree specification to convert the attributes of > +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent > +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree > +specification v0.4-rc1). > + > +RISCV_EFI_BOOT_PROTOCOL > +~~~~~~~~~~~~~~~~~~~~~~~ > + > +When booting with UEFI, the EFI stub requires the boot hartid in order to pass > +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using > +one of the following methods: > + > +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). > +- `boot-hartid` devicetree subnode (**deprecated**). > + > +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree > +based approach is deprecated now. > + > +Early Boot Requirements and Constraints > +======================================= > + > +The RISC-V kernel's early boot process operates under the following constraints: > + > +EFI stub and devicetree > +----------------------- > + > +When booting with UEFI, the devicetree is supplemented (or created) by the EFI > +stub with the same parameters as arm64 which are described at the paragraph > +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. > + > +Virtual mapping installation > +---------------------------- > + > +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: > + > +1. :c:func:`setup_vm` installs a temporary kernel mapping in > + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the > + kernel text/data are mapped at this point. When establishing this mapping, no > + allocation can be done (since the system memory is not known yet), so > + :c:var:`early_pg_dir` page table is statically allocated (using only one > + table for each level). > + > +2. :c:func:`setup_vm_final` creates the final kernel mapping in > + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory > + to create the linear mapping. When establishing this mapping, the kernel > + can allocate memory but cannot access it directly (since the direct mapping > + is not present yet), so it uses temporary mappings in the fixmap region to > + be able to access the newly allocated page table levels. > + > +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly > +convert direct mapping addresses to physical addresses, they need to know the > +start of the DRAM. This happens after step 1, right before step 2 installs the > +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). > +Any usage of those macros before the final virtual mapping is installed must > +be carefully examined. > + > +Device-tree mapping via fixmap > +------------------------------ > + > +The RISC-V kernel uses the fixmap region to map the devicetree because the > +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and > +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is > +initialized with virtual addresses established by :c:func:`setup_vm` and used > +with the mapping established by :c:func:`setup_vm_final`. > + > +Pre-MMU execution > +----------------- > + > +A few pieces of code need to run before even the first virtual mapping is > +established. These are the installation of the first virtual mapping itself, > +patching of early alternatives and the early parsing of the kernel command line. > +That code must be very carefully compiled as: > + > +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since > + otherwise, any access to a global symbol would go through the GOT which is > + only relocated virtually. > +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid > + any relocations to happen before the MMU is setup. > +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and > + others). > + > +As using a symbol from a different compilation unit requires this unit to be > +compiled with those flags, we advise, as much as possible, not to use external > +symbols. > diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst > index 175a91db0200..1f66062def6d 100644 > --- a/Documentation/riscv/index.rst > +++ b/Documentation/riscv/index.rst > @@ -5,6 +5,7 @@ RISC-V architecture > .. toctree:: > :maxdepth: 1 > > + boot > boot-image-header > vm-layout > hwprobe > -- > 2.39.2 > Otherwise looks good to me. Thanks, drew
On Wed, Jun 21, 2023 at 2:15 PM Conor Dooley <conor.dooley@microchip.com> wrote: > > Hey Alex, > > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > > This document describes the constraints and requirements of the early > > boot process in a RISC-V kernel. > > Thanks a lot for writing this & implementing the feedback :) > I had one or two minor comments about rather long sentences, but there's Arf, sorry, which one? So that I can fix that in case of a v3. > little point I think in respinning for that, so I have ignored them. > Other than that, didn't spot anything new on this second reading. > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Cheers, > Conor.
On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > This document describes the constraints and requirements of the early > boot process in a RISC-V kernel. > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > --- Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Thanks! Sunil
On Wed, Jun 21, 2023 at 02:26:02PM +0200, Alexandre Ghiti wrote: > On Wed, Jun 21, 2023 at 2:15 PM Conor Dooley <conor.dooley@microchip.com> wrote: > > > > Hey Alex, > > > > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > > > This document describes the constraints and requirements of the early > > > boot process in a RISC-V kernel. > > > > Thanks a lot for writing this & implementing the feedback :) > > I had one or two minor comments about rather long sentences, but there's > > Arf, sorry, which one? So that I can fix that in case of a v3. > > little point I think in respinning for that, so I have ignored them. Nah, not worth the effort ;) > > Other than that, didn't spot anything new on this second reading. > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > Cheers, > > Conor.
On Wed, 21 Jun 2023 00:22:33 PDT (-0700), alexghiti@rivosinc.com wrote: > This document describes the constraints and requirements of the early > boot process in a RISC-V kernel. > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > --- > Documentation/riscv/boot-image-header.rst | 3 - > Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ > Documentation/riscv/index.rst | 1 + > 3 files changed, 171 insertions(+), 3 deletions(-) > create mode 100644 Documentation/riscv/boot.rst > > diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst > index d7752533865f..a4a45310c4c4 100644 > --- a/Documentation/riscv/boot-image-header.rst > +++ b/Documentation/riscv/boot-image-header.rst > @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux > > This document only describes the boot image header details for RISC-V Linux. > > -TODO: > - Write a complete booting guide. > - > The following 64-byte header is present in decompressed Linux kernel image:: > > u32 code0; /* Executable code */ > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst > new file mode 100644 > index 000000000000..019ee818686d > --- /dev/null > +++ b/Documentation/riscv/boot.rst > @@ -0,0 +1,170 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +=============================================== > +RISC-V Kernel Boot Requirements and Constraints > +=============================================== > + > +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> > +:Date: 23 May 2023 > + > +This document describes what the RISC-V kernel expects from bootloaders and > +firmware, but also the constraints that any developer must have in mind when > +touching the early boot process. For the purposes of this document, the > +'early boot process' refers to any code that runs before the final virtual > +mapping is set up. > + > +Pre-kernel Requirements and Constraints > +======================================= > + > +The RISC-V kernel expects the following of bootloaders and platform firmware: > + > +Register state > +-------------- > + > +The RISC-V kernel expects: > + > + * `$a0` to contain the hartid of the current core. > + * `$a1` to contain the address of the devicetree in memory. > + > +CSR state > +--------- > + > +The RISC-V kernel expects: > + > + * `$satp = 0`: the MMU, if present, must be disabled. > + > +Reserved memory for resident firmware > +------------------------------------- > + > +The RISC-V kernel must not map any resident memory, or memory protected with > +PMPs, in the direct mapping, so the firmware must correctly mark those regions > +as per the devicetree specification and/or the UEFI specification. > + > +Kernel location > +--------------- > + > +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 > +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the > +kernel if that's not the case. > + > +Hardware description > +-------------------- > + > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > + > +The devicetree is either passed directly to the kernel from the previous stage > +using the `$a1` register, or when booting with UEFI, it can be passed using the > +EFI configuration table. > + > +The ACPI tables are passed to the kernel using the EFI configuration table. In > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > +"EFI stub and devicetree" tree section below for details about this devicetree. > + > +Kernel entrance > +--------------- > + > +On SMP systems, there are 2 methods to enter the kernel: > + > +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart > + wins a lottery and executes the early boot code while the other harts are > + parked waiting for the initialization to finish. This method is mostly used to > + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. > +- `Ordered booting`: the firmware releases only one hart that will execute the > + initialization phase and then will start all other harts using the SBI HSM > + extension. The ordered booting method is the preferred booting method for > + booting the RISC-V kernel because it can support cpu hotplug and kexec. > + > +UEFI > +---- > + > +UEFI memory map > +~~~~~~~~~~~~~~~ > + > +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to > +populate the system memory. > + > +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree > +node and abide by the devicetree specification to convert the attributes of > +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent > +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree > +specification v0.4-rc1). > + > +RISCV_EFI_BOOT_PROTOCOL > +~~~~~~~~~~~~~~~~~~~~~~~ > + > +When booting with UEFI, the EFI stub requires the boot hartid in order to pass > +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using > +one of the following methods: > + > +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). > +- `boot-hartid` devicetree subnode (**deprecated**). > + > +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree > +based approach is deprecated now. > + > +Early Boot Requirements and Constraints > +======================================= > + > +The RISC-V kernel's early boot process operates under the following constraints: > + > +EFI stub and devicetree > +----------------------- > + > +When booting with UEFI, the devicetree is supplemented (or created) by the EFI > +stub with the same parameters as arm64 which are described at the paragraph > +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. > + > +Virtual mapping installation > +---------------------------- > + > +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: > + > +1. :c:func:`setup_vm` installs a temporary kernel mapping in > + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the > + kernel text/data are mapped at this point. When establishing this mapping, no > + allocation can be done (since the system memory is not known yet), so > + :c:var:`early_pg_dir` page table is statically allocated (using only one > + table for each level). > + > +2. :c:func:`setup_vm_final` creates the final kernel mapping in > + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory > + to create the linear mapping. When establishing this mapping, the kernel > + can allocate memory but cannot access it directly (since the direct mapping > + is not present yet), so it uses temporary mappings in the fixmap region to > + be able to access the newly allocated page table levels. > + > +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly > +convert direct mapping addresses to physical addresses, they need to know the > +start of the DRAM. This happens after step 1, right before step 2 installs the > +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). > +Any usage of those macros before the final virtual mapping is installed must > +be carefully examined. > + > +Device-tree mapping via fixmap > +------------------------------ > + > +The RISC-V kernel uses the fixmap region to map the devicetree because the > +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and > +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is > +initialized with virtual addresses established by :c:func:`setup_vm` and used > +with the mapping established by :c:func:`setup_vm_final`. > + > +Pre-MMU execution > +----------------- > + > +A few pieces of code need to run before even the first virtual mapping is > +established. These are the installation of the first virtual mapping itself, > +patching of early alternatives and the early parsing of the kernel command line. > +That code must be very carefully compiled as: > + > +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since > + otherwise, any access to a global symbol would go through the GOT which is > + only relocated virtually. > +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid > + any relocations to happen before the MMU is setup. > +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and > + others). > + > +As using a symbol from a different compilation unit requires this unit to be > +compiled with those flags, we advise, as much as possible, not to use external > +symbols. > diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst > index 175a91db0200..1f66062def6d 100644 > --- a/Documentation/riscv/index.rst > +++ b/Documentation/riscv/index.rst > @@ -5,6 +5,7 @@ RISC-V architecture > .. toctree:: > :maxdepth: 1 > > + boot > boot-image-header > vm-layout > hwprobe Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> in case someone wants to pick this up along with the others.
On Wed, Jun 21, 2023 at 02:19:50PM +0200, Andrew Jones wrote: > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: ... > > +Hardware description > > +-------------------- > > + > > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > > + > > +The devicetree is either passed directly to the kernel from the previous stage > > +using the `$a1` register, or when booting with UEFI, it can be passed using the > > +EFI configuration table. > > + > > +The ACPI tables are passed to the kernel using the EFI configuration table. In > > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > > +"EFI stub and devicetree" tree section below for details about this devicetree. > ^ redundant 'tree' here > Can whoever applies this drop this 'tree' I pointed while applying? Thanks, drew
On Thu, Jun 22, 2023 at 7:24 PM Andrew Jones <ajones@ventanamicro.com> wrote: > > On Wed, Jun 21, 2023 at 02:19:50PM +0200, Andrew Jones wrote: > > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > ... > > > +Hardware description > > > +-------------------- > > > + > > > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > > > + > > > +The devicetree is either passed directly to the kernel from the previous stage > > > +using the `$a1` register, or when booting with UEFI, it can be passed using the > > > +EFI configuration table. > > > + > > > +The ACPI tables are passed to the kernel using the EFI configuration table. In > > > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > > > +"EFI stub and devicetree" tree section below for details about this devicetree. > > ^ redundant 'tree' here > > > > Can whoever applies this drop this 'tree' I pointed while applying? Yes, sorry: @Conor Dooley give me the overly long lines you wanted me to break and I'll send a v3, it won't take much time and I'll fix this too! > > Thanks, > drew
On Thu, Jun 22, 2023 at 07:32:23PM +0200, Alexandre Ghiti wrote: > On Thu, Jun 22, 2023 at 7:24 PM Andrew Jones <ajones@ventanamicro.com> wrote: > > > > On Wed, Jun 21, 2023 at 02:19:50PM +0200, Andrew Jones wrote: > > > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > > ... > > > > +Hardware description > > > > +-------------------- > > > > + > > > > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > > > > + > > > > +The devicetree is either passed directly to the kernel from the previous stage > > > > +using the `$a1` register, or when booting with UEFI, it can be passed using the > > > > +EFI configuration table. > > > > + > > > > +The ACPI tables are passed to the kernel using the EFI configuration table. In > > > > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > > > > +"EFI stub and devicetree" tree section below for details about this devicetree. > > > ^ redundant 'tree' here > > > > > > > Can whoever applies this drop this 'tree' I pointed while applying? > > Yes, sorry: @Conor Dooley give me the overly long lines you wanted me > to break and I'll send a v3, it won't take much time and I'll fix this > too! Look, I said it was pure pedantry on my part, and not something that helps with understanding. You've been warned! diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst index 019ee818686d..a52793fd9f6c 100644 --- a/Documentation/riscv/boot.rst +++ b/Documentation/riscv/boot.rst @@ -143,11 +143,12 @@ be carefully examined. Device-tree mapping via fixmap ------------------------------ -The RISC-V kernel uses the fixmap region to map the devicetree because the -devicetree virtual mapping must remain the same between :c:func:`setup_vm` and -:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is -initialized with virtual addresses established by :c:func:`setup_vm` and used -with the mapping established by :c:func:`setup_vm_final`. + +As the :c:var:`reserved_mem` array is initialized with virtual addresses +established by :c:func:`setup_vm`, and used with the mapping established by +:c:func:`setup_vm_final`, the RISC-V kernel uses the fixmap region to map the +devicetree. This ensures that the same virtual mapping is used by both +functions. Pre-MMU execution -----------------
On Thu, Jun 22, 2023 at 7:41 PM Conor Dooley <conor@kernel.org> wrote: > > On Thu, Jun 22, 2023 at 07:32:23PM +0200, Alexandre Ghiti wrote: > > On Thu, Jun 22, 2023 at 7:24 PM Andrew Jones <ajones@ventanamicro.com> wrote: > > > > > > On Wed, Jun 21, 2023 at 02:19:50PM +0200, Andrew Jones wrote: > > > > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > > > ... > > > > > +Hardware description > > > > > +-------------------- > > > > > + > > > > > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > > > > > + > > > > > +The devicetree is either passed directly to the kernel from the previous stage > > > > > +using the `$a1` register, or when booting with UEFI, it can be passed using the > > > > > +EFI configuration table. > > > > > + > > > > > +The ACPI tables are passed to the kernel using the EFI configuration table. In > > > > > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > > > > > +"EFI stub and devicetree" tree section below for details about this devicetree. > > > > ^ redundant 'tree' here > > > > > > > > > > Can whoever applies this drop this 'tree' I pointed while applying? > > > > Yes, sorry: @Conor Dooley give me the overly long lines you wanted me > > to break and I'll send a v3, it won't take much time and I'll fix this > > too! > > Look, I said it was pure pedantry on my part, and not something that > helps with understanding. You've been warned! > > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst > index 019ee818686d..a52793fd9f6c 100644 > --- a/Documentation/riscv/boot.rst > +++ b/Documentation/riscv/boot.rst > @@ -143,11 +143,12 @@ be carefully examined. > Device-tree mapping via fixmap > ------------------------------ > > -The RISC-V kernel uses the fixmap region to map the devicetree because the > -devicetree virtual mapping must remain the same between :c:func:`setup_vm` and > -:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is > -initialized with virtual addresses established by :c:func:`setup_vm` and used > -with the mapping established by :c:func:`setup_vm_final`. > + > +As the :c:var:`reserved_mem` array is initialized with virtual addresses > +established by :c:func:`setup_vm`, and used with the mapping established by > +:c:func:`setup_vm_final`, the RISC-V kernel uses the fixmap region to map the > +devicetree. This ensures that the same virtual mapping is used by both > +functions. > Oh my, so pedantic...:) I don't like the last sentence though, I'll change it for: "This ensures that the devicetree remains accessible by both virtual mappings." Thanks! > Pre-MMU execution > -----------------
On 21/06/2023 14:19, Andrew Jones wrote: > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: >> This document describes the constraints and requirements of the early >> boot process in a RISC-V kernel. >> >> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> >> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> >> --- >> Documentation/riscv/boot-image-header.rst | 3 - >> Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ >> Documentation/riscv/index.rst | 1 + >> 3 files changed, 171 insertions(+), 3 deletions(-) >> create mode 100644 Documentation/riscv/boot.rst >> >> diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst >> index d7752533865f..a4a45310c4c4 100644 >> --- a/Documentation/riscv/boot-image-header.rst >> +++ b/Documentation/riscv/boot-image-header.rst >> @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux >> >> This document only describes the boot image header details for RISC-V Linux. >> >> -TODO: >> - Write a complete booting guide. >> - >> The following 64-byte header is present in decompressed Linux kernel image:: >> >> u32 code0; /* Executable code */ >> diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst >> new file mode 100644 >> index 000000000000..019ee818686d >> --- /dev/null >> +++ b/Documentation/riscv/boot.rst >> @@ -0,0 +1,170 @@ >> +.. SPDX-License-Identifier: GPL-2.0 >> + >> +=============================================== >> +RISC-V Kernel Boot Requirements and Constraints >> +=============================================== >> + >> +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> >> +:Date: 23 May 2023 >> + >> +This document describes what the RISC-V kernel expects from bootloaders and >> +firmware, but also the constraints that any developer must have in mind when >> +touching the early boot process. For the purposes of this document, the >> +'early boot process' refers to any code that runs before the final virtual >> +mapping is set up. >> + >> +Pre-kernel Requirements and Constraints >> +======================================= >> + >> +The RISC-V kernel expects the following of bootloaders and platform firmware: >> + >> +Register state >> +-------------- >> + >> +The RISC-V kernel expects: >> + >> + * `$a0` to contain the hartid of the current core. >> + * `$a1` to contain the address of the devicetree in memory. >> + >> +CSR state >> +--------- >> + >> +The RISC-V kernel expects: >> + >> + * `$satp = 0`: the MMU, if present, must be disabled. >> + >> +Reserved memory for resident firmware >> +------------------------------------- >> + >> +The RISC-V kernel must not map any resident memory, or memory protected with >> +PMPs, in the direct mapping, so the firmware must correctly mark those regions >> +as per the devicetree specification and/or the UEFI specification. >> + >> +Kernel location >> +--------------- >> + >> +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 >> +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the >> +kernel if that's not the case. >> + >> +Hardware description >> +-------------------- >> + >> +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. >> + >> +The devicetree is either passed directly to the kernel from the previous stage >> +using the `$a1` register, or when booting with UEFI, it can be passed using the >> +EFI configuration table. >> + >> +The ACPI tables are passed to the kernel using the EFI configuration table. In >> +this case, a tiny devicetree is still created by the EFI stub. Please refer to >> +"EFI stub and devicetree" tree section below for details about this devicetree. > ^ redundant 'tree' here > >> + >> +Kernel entrance >> +--------------- >> + >> +On SMP systems, there are 2 methods to enter the kernel: >> + >> +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart >> + wins a lottery and executes the early boot code while the other harts are >> + parked waiting for the initialization to finish. This method is mostly used to >> + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. >> +- `Ordered booting`: the firmware releases only one hart that will execute the >> + initialization phase and then will start all other harts using the SBI HSM >> + extension. The ordered booting method is the preferred booting method for >> + booting the RISC-V kernel because it can support cpu hotplug and kexec. >> + >> +UEFI >> +---- >> + >> +UEFI memory map >> +~~~~~~~~~~~~~~~ >> + >> +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to >> +populate the system memory. >> + >> +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree >> +node and abide by the devicetree specification to convert the attributes of >> +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent >> +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree >> +specification v0.4-rc1). >> + >> +RISCV_EFI_BOOT_PROTOCOL >> +~~~~~~~~~~~~~~~~~~~~~~~ >> + >> +When booting with UEFI, the EFI stub requires the boot hartid in order to pass >> +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using >> +one of the following methods: >> + >> +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). >> +- `boot-hartid` devicetree subnode (**deprecated**). >> + >> +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree >> +based approach is deprecated now. >> + >> +Early Boot Requirements and Constraints >> +======================================= >> + >> +The RISC-V kernel's early boot process operates under the following constraints: >> + >> +EFI stub and devicetree >> +----------------------- >> + >> +When booting with UEFI, the devicetree is supplemented (or created) by the EFI >> +stub with the same parameters as arm64 which are described at the paragraph >> +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. >> + >> +Virtual mapping installation >> +---------------------------- >> + >> +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: >> + >> +1. :c:func:`setup_vm` installs a temporary kernel mapping in >> + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the >> + kernel text/data are mapped at this point. When establishing this mapping, no >> + allocation can be done (since the system memory is not known yet), so >> + :c:var:`early_pg_dir` page table is statically allocated (using only one >> + table for each level). >> + >> +2. :c:func:`setup_vm_final` creates the final kernel mapping in >> + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory >> + to create the linear mapping. When establishing this mapping, the kernel >> + can allocate memory but cannot access it directly (since the direct mapping >> + is not present yet), so it uses temporary mappings in the fixmap region to >> + be able to access the newly allocated page table levels. >> + >> +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly >> +convert direct mapping addresses to physical addresses, they need to know the >> +start of the DRAM. This happens after step 1, right before step 2 installs the >> +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). >> +Any usage of those macros before the final virtual mapping is installed must >> +be carefully examined. >> + >> +Device-tree mapping via fixmap >> +------------------------------ >> + >> +The RISC-V kernel uses the fixmap region to map the devicetree because the >> +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and >> +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is >> +initialized with virtual addresses established by :c:func:`setup_vm` and used >> +with the mapping established by :c:func:`setup_vm_final`. >> + >> +Pre-MMU execution >> +----------------- >> + >> +A few pieces of code need to run before even the first virtual mapping is >> +established. These are the installation of the first virtual mapping itself, >> +patching of early alternatives and the early parsing of the kernel command line. >> +That code must be very carefully compiled as: >> + >> +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since >> + otherwise, any access to a global symbol would go through the GOT which is >> + only relocated virtually. >> +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid >> + any relocations to happen before the MMU is setup. >> +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and >> + others). >> + >> +As using a symbol from a different compilation unit requires this unit to be >> +compiled with those flags, we advise, as much as possible, not to use external >> +symbols. >> diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst >> index 175a91db0200..1f66062def6d 100644 >> --- a/Documentation/riscv/index.rst >> +++ b/Documentation/riscv/index.rst >> @@ -5,6 +5,7 @@ RISC-V architecture >> .. toctree:: >> :maxdepth: 1 >> >> + boot >> boot-image-header >> vm-layout >> hwprobe >> -- >> 2.39.2 >> > Otherwise looks good to me. I assume I can add your RB here, don't waste time answering if I'm right :) Thanks! > > Thanks, > drew > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Fri, Jun 23, 2023 at 10:48:55AM +0200, Alexandre Ghiti wrote: > > On 21/06/2023 14:19, Andrew Jones wrote: > > On Wed, Jun 21, 2023 at 09:22:33AM +0200, Alexandre Ghiti wrote: > > > This document describes the constraints and requirements of the early > > > boot process in a RISC-V kernel. > > > > > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > > > Reviewed-by: Björn Töpel <bjorn@rivosinc.com> > > > --- > > > Documentation/riscv/boot-image-header.rst | 3 - > > > Documentation/riscv/boot.rst | 170 ++++++++++++++++++++++ > > > Documentation/riscv/index.rst | 1 + > > > 3 files changed, 171 insertions(+), 3 deletions(-) > > > create mode 100644 Documentation/riscv/boot.rst > > > > > > diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst > > > index d7752533865f..a4a45310c4c4 100644 > > > --- a/Documentation/riscv/boot-image-header.rst > > > +++ b/Documentation/riscv/boot-image-header.rst > > > @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux > > > This document only describes the boot image header details for RISC-V Linux. > > > -TODO: > > > - Write a complete booting guide. > > > - > > > The following 64-byte header is present in decompressed Linux kernel image:: > > > u32 code0; /* Executable code */ > > > diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst > > > new file mode 100644 > > > index 000000000000..019ee818686d > > > --- /dev/null > > > +++ b/Documentation/riscv/boot.rst > > > @@ -0,0 +1,170 @@ > > > +.. SPDX-License-Identifier: GPL-2.0 > > > + > > > +=============================================== > > > +RISC-V Kernel Boot Requirements and Constraints > > > +=============================================== > > > + > > > +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> > > > +:Date: 23 May 2023 > > > + > > > +This document describes what the RISC-V kernel expects from bootloaders and > > > +firmware, but also the constraints that any developer must have in mind when > > > +touching the early boot process. For the purposes of this document, the > > > +'early boot process' refers to any code that runs before the final virtual > > > +mapping is set up. > > > + > > > +Pre-kernel Requirements and Constraints > > > +======================================= > > > + > > > +The RISC-V kernel expects the following of bootloaders and platform firmware: > > > + > > > +Register state > > > +-------------- > > > + > > > +The RISC-V kernel expects: > > > + > > > + * `$a0` to contain the hartid of the current core. > > > + * `$a1` to contain the address of the devicetree in memory. > > > + > > > +CSR state > > > +--------- > > > + > > > +The RISC-V kernel expects: > > > + > > > + * `$satp = 0`: the MMU, if present, must be disabled. > > > + > > > +Reserved memory for resident firmware > > > +------------------------------------- > > > + > > > +The RISC-V kernel must not map any resident memory, or memory protected with > > > +PMPs, in the direct mapping, so the firmware must correctly mark those regions > > > +as per the devicetree specification and/or the UEFI specification. > > > + > > > +Kernel location > > > +--------------- > > > + > > > +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 > > > +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the > > > +kernel if that's not the case. > > > + > > > +Hardware description > > > +-------------------- > > > + > > > +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. > > > + > > > +The devicetree is either passed directly to the kernel from the previous stage > > > +using the `$a1` register, or when booting with UEFI, it can be passed using the > > > +EFI configuration table. > > > + > > > +The ACPI tables are passed to the kernel using the EFI configuration table. In > > > +this case, a tiny devicetree is still created by the EFI stub. Please refer to > > > +"EFI stub and devicetree" tree section below for details about this devicetree. > > ^ redundant 'tree' here > > > > > + > > > +Kernel entrance > > > +--------------- > > > + > > > +On SMP systems, there are 2 methods to enter the kernel: > > > + > > > +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart > > > + wins a lottery and executes the early boot code while the other harts are > > > + parked waiting for the initialization to finish. This method is mostly used to > > > + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. > > > +- `Ordered booting`: the firmware releases only one hart that will execute the > > > + initialization phase and then will start all other harts using the SBI HSM > > > + extension. The ordered booting method is the preferred booting method for > > > + booting the RISC-V kernel because it can support cpu hotplug and kexec. > > > + > > > +UEFI > > > +---- > > > + > > > +UEFI memory map > > > +~~~~~~~~~~~~~~~ > > > + > > > +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to > > > +populate the system memory. > > > + > > > +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree > > > +node and abide by the devicetree specification to convert the attributes of > > > +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent > > > +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree > > > +specification v0.4-rc1). > > > + > > > +RISCV_EFI_BOOT_PROTOCOL > > > +~~~~~~~~~~~~~~~~~~~~~~~ > > > + > > > +When booting with UEFI, the EFI stub requires the boot hartid in order to pass > > > +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using > > > +one of the following methods: > > > + > > > +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). > > > +- `boot-hartid` devicetree subnode (**deprecated**). > > > + > > > +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree > > > +based approach is deprecated now. > > > + > > > +Early Boot Requirements and Constraints > > > +======================================= > > > + > > > +The RISC-V kernel's early boot process operates under the following constraints: > > > + > > > +EFI stub and devicetree > > > +----------------------- > > > + > > > +When booting with UEFI, the devicetree is supplemented (or created) by the EFI > > > +stub with the same parameters as arm64 which are described at the paragraph > > > +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. > > > + > > > +Virtual mapping installation > > > +---------------------------- > > > + > > > +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: > > > + > > > +1. :c:func:`setup_vm` installs a temporary kernel mapping in > > > + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the > > > + kernel text/data are mapped at this point. When establishing this mapping, no > > > + allocation can be done (since the system memory is not known yet), so > > > + :c:var:`early_pg_dir` page table is statically allocated (using only one > > > + table for each level). > > > + > > > +2. :c:func:`setup_vm_final` creates the final kernel mapping in > > > + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory > > > + to create the linear mapping. When establishing this mapping, the kernel > > > + can allocate memory but cannot access it directly (since the direct mapping > > > + is not present yet), so it uses temporary mappings in the fixmap region to > > > + be able to access the newly allocated page table levels. > > > + > > > +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly > > > +convert direct mapping addresses to physical addresses, they need to know the > > > +start of the DRAM. This happens after step 1, right before step 2 installs the > > > +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). > > > +Any usage of those macros before the final virtual mapping is installed must > > > +be carefully examined. > > > + > > > +Device-tree mapping via fixmap > > > +------------------------------ > > > + > > > +The RISC-V kernel uses the fixmap region to map the devicetree because the > > > +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and > > > +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is > > > +initialized with virtual addresses established by :c:func:`setup_vm` and used > > > +with the mapping established by :c:func:`setup_vm_final`. > > > + > > > +Pre-MMU execution > > > +----------------- > > > + > > > +A few pieces of code need to run before even the first virtual mapping is > > > +established. These are the installation of the first virtual mapping itself, > > > +patching of early alternatives and the early parsing of the kernel command line. > > > +That code must be very carefully compiled as: > > > + > > > +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since > > > + otherwise, any access to a global symbol would go through the GOT which is > > > + only relocated virtually. > > > +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid > > > + any relocations to happen before the MMU is setup. > > > +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and > > > + others). > > > + > > > +As using a symbol from a different compilation unit requires this unit to be > > > +compiled with those flags, we advise, as much as possible, not to use external > > > +symbols. > > > diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst > > > index 175a91db0200..1f66062def6d 100644 > > > --- a/Documentation/riscv/index.rst > > > +++ b/Documentation/riscv/index.rst > > > @@ -5,6 +5,7 @@ RISC-V architecture > > > .. toctree:: > > > :maxdepth: 1 > > > + boot > > > boot-image-header > > > vm-layout > > > hwprobe > > > -- > > > 2.39.2 > > > > > Otherwise looks good to me. > > > I assume I can add your RB here, don't waste time answering if I'm right :) Yup, when I read it the first time I wasn't sure I was familiar enough with everything to give it an r-b, but I just read it again and grepped a few things that I wasn't already familiar with, so Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
diff --git a/Documentation/riscv/boot-image-header.rst b/Documentation/riscv/boot-image-header.rst index d7752533865f..a4a45310c4c4 100644 --- a/Documentation/riscv/boot-image-header.rst +++ b/Documentation/riscv/boot-image-header.rst @@ -7,9 +7,6 @@ Boot image header in RISC-V Linux This document only describes the boot image header details for RISC-V Linux. -TODO: - Write a complete booting guide. - The following 64-byte header is present in decompressed Linux kernel image:: u32 code0; /* Executable code */ diff --git a/Documentation/riscv/boot.rst b/Documentation/riscv/boot.rst new file mode 100644 index 000000000000..019ee818686d --- /dev/null +++ b/Documentation/riscv/boot.rst @@ -0,0 +1,170 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=============================================== +RISC-V Kernel Boot Requirements and Constraints +=============================================== + +:Author: Alexandre Ghiti <alexghiti@rivosinc.com> +:Date: 23 May 2023 + +This document describes what the RISC-V kernel expects from bootloaders and +firmware, but also the constraints that any developer must have in mind when +touching the early boot process. For the purposes of this document, the +'early boot process' refers to any code that runs before the final virtual +mapping is set up. + +Pre-kernel Requirements and Constraints +======================================= + +The RISC-V kernel expects the following of bootloaders and platform firmware: + +Register state +-------------- + +The RISC-V kernel expects: + + * `$a0` to contain the hartid of the current core. + * `$a1` to contain the address of the devicetree in memory. + +CSR state +--------- + +The RISC-V kernel expects: + + * `$satp = 0`: the MMU, if present, must be disabled. + +Reserved memory for resident firmware +------------------------------------- + +The RISC-V kernel must not map any resident memory, or memory protected with +PMPs, in the direct mapping, so the firmware must correctly mark those regions +as per the devicetree specification and/or the UEFI specification. + +Kernel location +--------------- + +The RISC-V kernel expects to be placed at a PMD boundary (2MB aligned for rv64 +and 4MB aligned for rv32). Note that the EFI stub will physically relocate the +kernel if that's not the case. + +Hardware description +-------------------- + +The firmware can pass either a devicetree or ACPI tables to the RISC-V kernel. + +The devicetree is either passed directly to the kernel from the previous stage +using the `$a1` register, or when booting with UEFI, it can be passed using the +EFI configuration table. + +The ACPI tables are passed to the kernel using the EFI configuration table. In +this case, a tiny devicetree is still created by the EFI stub. Please refer to +"EFI stub and devicetree" tree section below for details about this devicetree. + +Kernel entrance +--------------- + +On SMP systems, there are 2 methods to enter the kernel: + +- `RISCV_BOOT_SPINWAIT`: the firmware releases all harts in the kernel, one hart + wins a lottery and executes the early boot code while the other harts are + parked waiting for the initialization to finish. This method is mostly used to + support older firmwares without SBI HSM extension and M-mode RISC-V kernel. +- `Ordered booting`: the firmware releases only one hart that will execute the + initialization phase and then will start all other harts using the SBI HSM + extension. The ordered booting method is the preferred booting method for + booting the RISC-V kernel because it can support cpu hotplug and kexec. + +UEFI +---- + +UEFI memory map +~~~~~~~~~~~~~~~ + +When booting with UEFI, the RISC-V kernel will use only the EFI memory map to +populate the system memory. + +The UEFI firmware must parse the subnodes of the `/reserved-memory` devicetree +node and abide by the devicetree specification to convert the attributes of +those subnodes (`no-map` and `reusable`) into their correct EFI equivalent +(refer to section "3.5.4 /reserved-memory and UEFI" of the devicetree +specification v0.4-rc1). + +RISCV_EFI_BOOT_PROTOCOL +~~~~~~~~~~~~~~~~~~~~~~~ + +When booting with UEFI, the EFI stub requires the boot hartid in order to pass +it to the RISC-V kernel in `$a1`. The EFI stub retrieves the boot hartid using +one of the following methods: + +- `RISCV_EFI_BOOT_PROTOCOL` (**preferred**). +- `boot-hartid` devicetree subnode (**deprecated**). + +Any new firmware must implement `RISCV_EFI_BOOT_PROTOCOL` as the devicetree +based approach is deprecated now. + +Early Boot Requirements and Constraints +======================================= + +The RISC-V kernel's early boot process operates under the following constraints: + +EFI stub and devicetree +----------------------- + +When booting with UEFI, the devicetree is supplemented (or created) by the EFI +stub with the same parameters as arm64 which are described at the paragraph +"UEFI kernel support on ARM" in Documentation/arm/uefi.rst. + +Virtual mapping installation +---------------------------- + +The installation of the virtual mapping is done in 2 steps in the RISC-V kernel: + +1. :c:func:`setup_vm` installs a temporary kernel mapping in + :c:var:`early_pg_dir` which allows discovery of the system memory. Only the + kernel text/data are mapped at this point. When establishing this mapping, no + allocation can be done (since the system memory is not known yet), so + :c:var:`early_pg_dir` page table is statically allocated (using only one + table for each level). + +2. :c:func:`setup_vm_final` creates the final kernel mapping in + :c:var:`swapper_pg_dir` and takes advantage of the discovered system memory + to create the linear mapping. When establishing this mapping, the kernel + can allocate memory but cannot access it directly (since the direct mapping + is not present yet), so it uses temporary mappings in the fixmap region to + be able to access the newly allocated page table levels. + +For :c:func:`virt_to_phys` and :c:func:`phys_to_virt` to be able to correctly +convert direct mapping addresses to physical addresses, they need to know the +start of the DRAM. This happens after step 1, right before step 2 installs the +direct mapping (see :c:func:`setup_bootmem` function in arch/riscv/mm/init.c). +Any usage of those macros before the final virtual mapping is installed must +be carefully examined. + +Device-tree mapping via fixmap +------------------------------ + +The RISC-V kernel uses the fixmap region to map the devicetree because the +devicetree virtual mapping must remain the same between :c:func:`setup_vm` and +:c:func:`setup_vm_final` calls since the :c:var:`reserved_mem` array is +initialized with virtual addresses established by :c:func:`setup_vm` and used +with the mapping established by :c:func:`setup_vm_final`. + +Pre-MMU execution +----------------- + +A few pieces of code need to run before even the first virtual mapping is +established. These are the installation of the first virtual mapping itself, +patching of early alternatives and the early parsing of the kernel command line. +That code must be very carefully compiled as: + +- `-fno-pie`: This is needed for relocatable kernels which use `-fPIE`, since + otherwise, any access to a global symbol would go through the GOT which is + only relocated virtually. +- `-mcmodel=medany`: Any access to a global symbol must be PC-relative to avoid + any relocations to happen before the MMU is setup. +- *all* instrumentation must also be disabled (that includes KASAN, ftrace and + others). + +As using a symbol from a different compilation unit requires this unit to be +compiled with those flags, we advise, as much as possible, not to use external +symbols. diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst index 175a91db0200..1f66062def6d 100644 --- a/Documentation/riscv/index.rst +++ b/Documentation/riscv/index.rst @@ -5,6 +5,7 @@ RISC-V architecture .. toctree:: :maxdepth: 1 + boot boot-image-header vm-layout hwprobe