| Message ID | 20230626-thieving-jockstrap-d35d20b535c5@wendy (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | RISC-V: Probe DT extension support using riscv,isa-extensions & riscv,isa-base | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 488833ccdcac |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 6 and now 6 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 2832 this patch: 2832 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 16511 this patch: 16511 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 20 this patch: 20 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 62 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Mon, Jun 26, 2023 at 12:19:42PM +0100, Conor Dooley wrote: > In riscv_fill_hwcap() riscv_isa_ext array can be looped over, rather > than duplicating the list of extensions with individual > SET_ISA_EXT_MAP() usage. While at it, drop the statement-of-the-obvious > comments from the struct, rename uprop to something more suitable for > its new use & constify the members. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > arch/riscv/include/asm/hwcap.h | 6 ++---- > arch/riscv/kernel/cpu.c | 5 +++-- > arch/riscv/kernel/cpufeature.c | 26 +++++++------------------- > 3 files changed, 12 insertions(+), 25 deletions(-) > > diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h > index 7a57e6109aef..36f46dfd2b87 100644 > --- a/arch/riscv/include/asm/hwcap.h > +++ b/arch/riscv/include/asm/hwcap.h > @@ -70,10 +70,8 @@ > unsigned long riscv_get_elf_hwcap(void); > > struct riscv_isa_ext_data { > - /* Name of the extension displayed to userspace via /proc/cpuinfo */ > - char uprop[RISCV_ISA_EXT_NAME_LEN_MAX]; The RISCV_ISA_EXT_NAME_LEN_MAX define can now also be deleted. > - /* The logical ISA extension ID */ > - unsigned int isa_ext_id; > + const unsigned int id; > + const char *name; > }; > > extern const struct riscv_isa_ext_data riscv_isa_ext[]; > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 61fb92e7d524..beb8b16bbf87 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -164,9 +164,10 @@ static void print_isa_ext(struct seq_file *f) > { > for (int i = 0; i < riscv_isa_ext_count; i++) { > const struct riscv_isa_ext_data *edata = &riscv_isa_ext[i]; > - if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id)) > + if (!__riscv_isa_extension_available(NULL, edata->id)) > continue; > - seq_printf(f, "_%s", edata->uprop); > + > + seq_printf(f, "_%s", edata->name); > } > } > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index f0ae310006de..b5e23506c4f0 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -99,11 +99,10 @@ static bool riscv_isa_extension_check(int id) > return true; > } > > -#define __RISCV_ISA_EXT_DATA(UPROP, EXTID) \ > - { \ > - .uprop = #UPROP, \ > - .isa_ext_id = EXTID, \ > - } > +#define __RISCV_ISA_EXT_DATA(_name, _id) { \ > + .name = #_name, \ > + .id = _id, \ > +} > > /* > * The canonical order of ISA extension names in the ISA string is defined in > @@ -367,20 +366,9 @@ void __init riscv_fill_hwcap(void) > set_bit(nr, isainfo->isa); > } > } else { > - /* sorted alphabetically */ > - SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA); > - SET_ISA_EXT_MAP("ssaia", RISCV_ISA_EXT_SSAIA); > - SET_ISA_EXT_MAP("sscofpmf", RISCV_ISA_EXT_SSCOFPMF); > - SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC); > - SET_ISA_EXT_MAP("svinval", RISCV_ISA_EXT_SVINVAL); > - SET_ISA_EXT_MAP("svnapot", RISCV_ISA_EXT_SVNAPOT); > - SET_ISA_EXT_MAP("svpbmt", RISCV_ISA_EXT_SVPBMT); > - SET_ISA_EXT_MAP("zba", RISCV_ISA_EXT_ZBA); > - SET_ISA_EXT_MAP("zbb", RISCV_ISA_EXT_ZBB); > - SET_ISA_EXT_MAP("zbs", RISCV_ISA_EXT_ZBS); > - SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM); > - SET_ISA_EXT_MAP("zicboz", RISCV_ISA_EXT_ZICBOZ); > - SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE); > + for (int i = 0; i < riscv_isa_ext_count; i++) > + SET_ISA_EXT_MAP(riscv_isa_ext[i].name, > + riscv_isa_ext[i].id); Three cheers for removing one list that needed to be maintained! > } > #undef SET_ISA_EXT_MAP > } > -- > 2.40.1 > Other than also dropping the define, Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 7a57e6109aef..36f46dfd2b87 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -70,10 +70,8 @@ unsigned long riscv_get_elf_hwcap(void); struct riscv_isa_ext_data { - /* Name of the extension displayed to userspace via /proc/cpuinfo */ - char uprop[RISCV_ISA_EXT_NAME_LEN_MAX]; - /* The logical ISA extension ID */ - unsigned int isa_ext_id; + const unsigned int id; + const char *name; }; extern const struct riscv_isa_ext_data riscv_isa_ext[]; diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 61fb92e7d524..beb8b16bbf87 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -164,9 +164,10 @@ static void print_isa_ext(struct seq_file *f) { for (int i = 0; i < riscv_isa_ext_count; i++) { const struct riscv_isa_ext_data *edata = &riscv_isa_ext[i]; - if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id)) + if (!__riscv_isa_extension_available(NULL, edata->id)) continue; - seq_printf(f, "_%s", edata->uprop); + + seq_printf(f, "_%s", edata->name); } } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index f0ae310006de..b5e23506c4f0 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -99,11 +99,10 @@ static bool riscv_isa_extension_check(int id) return true; } -#define __RISCV_ISA_EXT_DATA(UPROP, EXTID) \ - { \ - .uprop = #UPROP, \ - .isa_ext_id = EXTID, \ - } +#define __RISCV_ISA_EXT_DATA(_name, _id) { \ + .name = #_name, \ + .id = _id, \ +} /* * The canonical order of ISA extension names in the ISA string is defined in @@ -367,20 +366,9 @@ void __init riscv_fill_hwcap(void) set_bit(nr, isainfo->isa); } } else { - /* sorted alphabetically */ - SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA); - SET_ISA_EXT_MAP("ssaia", RISCV_ISA_EXT_SSAIA); - SET_ISA_EXT_MAP("sscofpmf", RISCV_ISA_EXT_SSCOFPMF); - SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC); - SET_ISA_EXT_MAP("svinval", RISCV_ISA_EXT_SVINVAL); - SET_ISA_EXT_MAP("svnapot", RISCV_ISA_EXT_SVNAPOT); - SET_ISA_EXT_MAP("svpbmt", RISCV_ISA_EXT_SVPBMT); - SET_ISA_EXT_MAP("zba", RISCV_ISA_EXT_ZBA); - SET_ISA_EXT_MAP("zbb", RISCV_ISA_EXT_ZBB); - SET_ISA_EXT_MAP("zbs", RISCV_ISA_EXT_ZBS); - SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM); - SET_ISA_EXT_MAP("zicboz", RISCV_ISA_EXT_ZICBOZ); - SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE); + for (int i = 0; i < riscv_isa_ext_count; i++) + SET_ISA_EXT_MAP(riscv_isa_ext[i].name, + riscv_isa_ext[i].id); } #undef SET_ISA_EXT_MAP }
In riscv_fill_hwcap() riscv_isa_ext array can be looped over, rather than duplicating the list of extensions with individual SET_ISA_EXT_MAP() usage. While at it, drop the statement-of-the-obvious comments from the struct, rename uprop to something more suitable for its new use & constify the members. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- arch/riscv/include/asm/hwcap.h | 6 ++---- arch/riscv/kernel/cpu.c | 5 +++-- arch/riscv/kernel/cpufeature.c | 26 +++++++------------------- 3 files changed, 12 insertions(+), 25 deletions(-)