| Message ID | 20230629-fruit-syndrome-74e32af9c8ad@wendy (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | RISC-V: Probe DT extension support using riscv,isa-extensions & riscv,isa-base | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 488833ccdcac |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 6 and now 6 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 8 this patch: 8 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 20 this patch: 20 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 49 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Thu, Jun 29, 2023 at 1:29 AM Conor Dooley <conor.dooley@microchip.com> wrote: > > From: Heiko Stuebner <heiko.stuebner@vrull.eu> > > When filling hwcap the kernel already expects the isa string to start with > rv32 if CONFIG_32BIT and rv64 if CONFIG_64BIT. > > So when recreating the runtime isa-string we can also just go the other way > to get the correct starting point for it. > > Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > Co-developed-by: Conor Dooley <conor.dooley@microchip.com> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > Changes in v2: > - Delete the whole else & pull print_mmu() above it, since that's common > code now > --- > arch/riscv/kernel/cpu.c | 21 +++++++++------------ > 1 file changed, 9 insertions(+), 12 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index a2fc952318e9..2fb5e8e1df52 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -253,13 +253,16 @@ static void print_isa_ext(struct seq_file *f) > */ > static const char base_riscv_exts[13] = "imafdqcbkjpvh"; > > -static void print_isa(struct seq_file *f, const char *isa) > +static void print_isa(struct seq_file *f) > { > int i; > > seq_puts(f, "isa\t\t: "); > - /* Print the rv[64/32] part */ > - seq_write(f, isa, 4); > + if (IS_ENABLED(CONFIG_32BIT)) > + seq_write(f, "rv32", 4); > + else > + seq_write(f, "rv64", 4); > + > for (i = 0; i < sizeof(base_riscv_exts); i++) { > if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a')) > /* Print only enabled the base ISA extensions */ > @@ -316,27 +319,21 @@ static int c_show(struct seq_file *m, void *v) > unsigned long cpu_id = (unsigned long)v - 1; > struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); > struct device_node *node; > - const char *compat, *isa; > + const char *compat; > > seq_printf(m, "processor\t: %lu\n", cpu_id); > seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); > + print_isa(m); > + print_mmu(m); Did the indent get wonky here or am I just seeing it wrong because gmail? Otherwise: Reviewed-by: Evan Green <evan@rivosinc.com> > > if (acpi_disabled) { > node = of_get_cpu_node(cpu_id, NULL); > - if (!of_property_read_string(node, "riscv,isa", &isa)) > - print_isa(m, isa); > > - print_mmu(m); > if (!of_property_read_string(node, "compatible", &compat) && > strcmp(compat, "riscv")) > seq_printf(m, "uarch\t\t: %s\n", compat); > > of_node_put(node); > - } else { > - if (!acpi_get_riscv_isa(NULL, cpu_id, &isa)) > - print_isa(m, isa); > - > - print_mmu(m); > } > > seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); > -- > 2.40.1 >
On Thu, Jun 29, 2023 at 04:10:48PM -0700, Evan Green wrote: > > + print_mmu(m); > > Did the indent get wonky here or am I just seeing it wrong because gmail? Nope, you're right. Thanks!
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index a2fc952318e9..2fb5e8e1df52 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -253,13 +253,16 @@ static void print_isa_ext(struct seq_file *f) */ static const char base_riscv_exts[13] = "imafdqcbkjpvh"; -static void print_isa(struct seq_file *f, const char *isa) +static void print_isa(struct seq_file *f) { int i; seq_puts(f, "isa\t\t: "); - /* Print the rv[64/32] part */ - seq_write(f, isa, 4); + if (IS_ENABLED(CONFIG_32BIT)) + seq_write(f, "rv32", 4); + else + seq_write(f, "rv64", 4); + for (i = 0; i < sizeof(base_riscv_exts); i++) { if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a')) /* Print only enabled the base ISA extensions */ @@ -316,27 +319,21 @@ static int c_show(struct seq_file *m, void *v) unsigned long cpu_id = (unsigned long)v - 1; struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); struct device_node *node; - const char *compat, *isa; + const char *compat; seq_printf(m, "processor\t: %lu\n", cpu_id); seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); + print_isa(m); + print_mmu(m); if (acpi_disabled) { node = of_get_cpu_node(cpu_id, NULL); - if (!of_property_read_string(node, "riscv,isa", &isa)) - print_isa(m, isa); - print_mmu(m); if (!of_property_read_string(node, "compatible", &compat) && strcmp(compat, "riscv")) seq_printf(m, "uarch\t\t: %s\n", compat); of_node_put(node); - } else { - if (!acpi_get_riscv_isa(NULL, cpu_id, &isa)) - print_isa(m, isa); - - print_mmu(m); } seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);