| Message ID | 20230907053742.250444-4-xingyu.wu@starfivetech.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | Add timer driver for StarFive JH7110 RISC-V SoC | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD cedf393669c6 |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 2 and now 2 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 39 this patch: 39 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 26 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
Xingyu Wu wrote: > Add the timer node for the Starfive JH7110 SoC. > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > Reviewed-by: Walker Chen <walker.chen@starfivetech.com> > Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> > --- > arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index ec2e70011a73..84bb9717be13 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -502,6 +502,26 @@ sysgpio: pinctrl@13040000 { > #gpio-cells = <2>; > }; > > + timer@13050000 { > + compatible = "starfive,jh7110-timer"; > + reg = <0x0 0x13050000 0x0 0x10000>; > + interrupts = <69>, <70>, <71> ,<72>; > + clocks = <&syscrg JH7110_SYSCLK_TIMER_APB>, > + <&syscrg JH7110_SYSCLK_TIMER0>, > + <&syscrg JH7110_SYSCLK_TIMER1>, > + <&syscrg JH7110_SYSCLK_TIMER2>, > + <&syscrg JH7110_SYSCLK_TIMER3>; > + clock-names = "apb", "ch0", "ch1", > + "ch2", "ch3"; > + resets = <&syscrg JH7110_SYSRST_TIMER_APB>, > + <&syscrg JH7110_SYSRST_TIMER0>, > + <&syscrg JH7110_SYSRST_TIMER1>, > + <&syscrg JH7110_SYSRST_TIMER2>, > + <&syscrg JH7110_SYSRST_TIMER3>; > + reset-names = "apb", "ch0", "ch1", > + "ch2", "ch3"; > + }; > + > watchdog@13070000 { > compatible = "starfive,jh7110-wdt"; > reg = <0x0 0x13070000 0x0 0x10000>; > -- > 2.25.1 >
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index ec2e70011a73..84bb9717be13 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -502,6 +502,26 @@ sysgpio: pinctrl@13040000 { #gpio-cells = <2>; }; + timer@13050000 { + compatible = "starfive,jh7110-timer"; + reg = <0x0 0x13050000 0x0 0x10000>; + interrupts = <69>, <70>, <71> ,<72>; + clocks = <&syscrg JH7110_SYSCLK_TIMER_APB>, + <&syscrg JH7110_SYSCLK_TIMER0>, + <&syscrg JH7110_SYSCLK_TIMER1>, + <&syscrg JH7110_SYSCLK_TIMER2>, + <&syscrg JH7110_SYSCLK_TIMER3>; + clock-names = "apb", "ch0", "ch1", + "ch2", "ch3"; + resets = <&syscrg JH7110_SYSRST_TIMER_APB>, + <&syscrg JH7110_SYSRST_TIMER0>, + <&syscrg JH7110_SYSRST_TIMER1>, + <&syscrg JH7110_SYSRST_TIMER2>, + <&syscrg JH7110_SYSRST_TIMER3>; + reset-names = "apb", "ch0", "ch1", + "ch2", "ch3"; + }; + watchdog@13070000 { compatible = "starfive,jh7110-wdt"; reg = <0x0 0x13070000 0x0 0x10000>;