| Message ID | 20230921141652.2657054-1-xiao.w.wang@intel.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 9a2834e91d3d1c7dc77aa3a5719a582ee5893205 |
| Headers | show |
| Series | riscv/mm: Fix the comment for swap pte format | expand |
On 21.09.23 16:16, Xiao Wang wrote: > Swap type takes bits 7-11 and swap offset should start from bit 12. > > Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> > --- > arch/riscv/include/asm/pgtable.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h > index e05b5dc1f0cb..e94a2998e81e 100644 > --- a/arch/riscv/include/asm/pgtable.h > +++ b/arch/riscv/include/asm/pgtable.h > @@ -812,7 +812,7 @@ extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, > * bit 5: _PAGE_PROT_NONE (zero) > * bit 6: exclusive marker > * bits 7 to 11: swap type > - * bits 11 to XLEN-1: swap offset > + * bits 12 to XLEN-1: swap offset > */ > #define __SWP_TYPE_SHIFT 7 > #define __SWP_TYPE_BITS 5 Reviewed-by: David Hildenbrand <david@redhat.com>
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index e05b5dc1f0cb..e94a2998e81e 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -812,7 +812,7 @@ extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, * bit 5: _PAGE_PROT_NONE (zero) * bit 6: exclusive marker * bits 7 to 11: swap type - * bits 11 to XLEN-1: swap offset + * bits 12 to XLEN-1: swap offset */ #define __SWP_TYPE_SHIFT 7 #define __SWP_TYPE_BITS 5
Swap type takes bits 7-11 and swap offset should start from bit 12. Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> --- arch/riscv/include/asm/pgtable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)