diff mbox series

[v9,14/15] RISC-V: Select APLIC and IMSIC drivers

Message ID 20230928061207.1841513-15-apatel@ventanamicro.com (mailing list archive)
State Superseded
Headers show
Series Linux RISC-V AIA Support | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR fail PR summary
conchuod/patch-14-test-1 success .github/scripts/patches/build_rv32_defconfig.sh
conchuod/patch-14-test-2 success .github/scripts/patches/build_rv64_clang_allmodconfig.sh
conchuod/patch-14-test-3 success .github/scripts/patches/build_rv64_gcc_allmodconfig.sh
conchuod/patch-14-test-4 success .github/scripts/patches/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-14-test-5 success .github/scripts/patches/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-14-test-6 success .github/scripts/patches/checkpatch.sh
conchuod/patch-14-test-7 success .github/scripts/patches/dtb_warn_rv64.sh
conchuod/patch-14-test-8 success .github/scripts/patches/header_inline.sh
conchuod/patch-14-test-9 success .github/scripts/patches/kdoc.sh
conchuod/patch-14-test-10 success .github/scripts/patches/maintainers_patterns.sh
conchuod/patch-14-test-11 success .github/scripts/patches/module_param.sh
conchuod/patch-14-test-12 success .github/scripts/patches/verify_fixes.sh
conchuod/patch-14-test-13 success .github/scripts/patches/verify_signedoff.sh

Commit Message

Anup Patel Sept. 28, 2023, 6:12 a.m. UTC
The QEMU virt machine supports AIA emulation and we also have
quite a few RISC-V platforms with AIA support under development
so let us select APLIC and IMSIC drivers for all RISC-V platforms.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d607ab0f7c6d..45c660f1219d 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -153,6 +153,8 @@  config RISCV
 	select PCI_DOMAINS_GENERIC if PCI
 	select PCI_MSI if PCI
 	select RISCV_ALTERNATIVE if !XIP_KERNEL
+	select RISCV_APLIC
+	select RISCV_IMSIC
 	select RISCV_INTC
 	select RISCV_TIMER if RISCV_SBI
 	select SIFIVE_PLIC