[v2] soc: renesas: make ARCH_R9A07G043 depend on required options

Commit Message

Conor Dooley Oct. 12, 2023, 11:04 a.m. UTC

From: Conor Dooley <[e-mail]>

Randy reported a randconfig build issue against linux-next:
WARNING: unmet direct dependencies detected for ERRATA_ANDES
  Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y]
  Selected by [y]:
  - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y]

../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration
   59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,

On RISC-V, alternatives are not usable in XIP kernels, which this
randconfig happened to select. Rather than add a check for whether
alternatives are available before selecting the ERRATA_ANDES config
option, rework the R9A07G043 Kconfig entry to depend on the
configuration options required to support its non-standard cache
coherency implementation.

Without these options enabled, the SoC is effectively non-functional to
begin with, so there's an extra benefit in preventing the creation of
non-functional kernels.

The "if RISCV_DMA_NONCOHERENT" can be dropped, as ERRATA_ANDES_CMO will
select it.

Reported-by: Randy Dunlap <[e-mail]>
Closes: https://lore.kernel.org/all/[e-mail]/
Signed-off-by: Conor Dooley <[e-mail]>
---

I dropped Randy's t-b etc since this patch is quite different.

v2: drop the extra condition on the select of ERRATA_ANDES, move instead
to depending on required options.

CC: Geert Uytterhoeven <[e-mail]>
CC: Magnus Damm <[e-mail]>
CC: Paul Walmsley <[e-mail]>
CC: Palmer Dabbelt <[e-mail]>
CC: Albert Ou <[e-mail]>
CC: Lad Prabhakar <[e-mail]>
CC: [e-mail]
CC: [e-mail]
CC: [e-mail]
---
 drivers/soc/renesas/Kconfig | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Geert Uytterhoeven Oct. 12, 2023, 12:15 p.m. UTC | #1

Hi Conor,

On Thu, Oct 12, 2023 at 1:11 PM Conor Dooley <[e-mail]> wrote:
> From: Conor Dooley <[e-mail]>
>
> Randy reported a randconfig build issue against linux-next:
> WARNING: unmet direct dependencies detected for ERRATA_ANDES
>   Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y]
>   Selected by [y]:
>   - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y]
>
> ../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration
>    59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
>
> On RISC-V, alternatives are not usable in XIP kernels, which this
> randconfig happened to select. Rather than add a check for whether
> alternatives are available before selecting the ERRATA_ANDES config
> option, rework the R9A07G043 Kconfig entry to depend on the
> configuration options required to support its non-standard cache
> coherency implementation.
>
> Without these options enabled, the SoC is effectively non-functional to
> begin with, so there's an extra benefit in preventing the creation of
> non-functional kernels.
>
> The "if RISCV_DMA_NONCOHERENT" can be dropped, as ERRATA_ANDES_CMO will
> select it.
>
> Reported-by: Randy Dunlap <[e-mail]>
> Closes: https://lore.kernel.org/all/[e-mail]/
> Signed-off-by: Conor Dooley <[e-mail]>
> ---
>
> I dropped Randy's t-b etc since this patch is quite different.
>
> v2: drop the extra condition on the select of ERRATA_ANDES, move instead
> to depending on required options.

Thanks for the update!

Reviewed-by: Geert Uytterhoeven <[e-mail]>
i.e. will queue in renesas-fixes for v6.6.

> --- a/drivers/soc/renesas/Kconfig
> +++ b/drivers/soc/renesas/Kconfig
> @@ -340,10 +340,12 @@ if RISCV
>  config ARCH_R9A07G043
>         bool "RISC-V Platform support for RZ/Five"
>         depends on NONPORTABLE
> +       depends on RISCV_ALTERNATIVE
> +       depends on RISCV_SBI
>         select ARCH_RZG2L
> -       select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT
> +       select AX45MP_L2_CACHE
>         select DMA_GLOBAL_POOL
> -       select ERRATA_ANDES if RISCV_SBI
> +       select ERRATA_ANDES
>         select ERRATA_ANDES_CMO if ERRATA_ANDES

As ERRATA_ANDES is now selected unconditionally, the test
for it can be removed.  I can do that while applying.

>         help
>           This enables support for the Renesas RZ/Five SoC.

Gr{oetje,eeting}s,

                        Geert

Conor Dooley Oct. 12, 2023, 12:55 p.m. UTC | #2

On Thu, Oct 12, 2023 at 02:15:21PM +0200, Geert Uytterhoeven wrote:

> > --- a/drivers/soc/renesas/Kconfig
> > +++ b/drivers/soc/renesas/Kconfig
> > @@ -340,10 +340,12 @@ if RISCV
> >  config ARCH_R9A07G043
> >         bool "RISC-V Platform support for RZ/Five"
> >         depends on NONPORTABLE
> > +       depends on RISCV_ALTERNATIVE
> > +       depends on RISCV_SBI
> >         select ARCH_RZG2L
> > -       select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT
> > +       select AX45MP_L2_CACHE
> >         select DMA_GLOBAL_POOL
> > -       select ERRATA_ANDES if RISCV_SBI
> > +       select ERRATA_ANDES
> >         select ERRATA_ANDES_CMO if ERRATA_ANDES
> 
> As ERRATA_ANDES is now selected unconditionally, the test
> for it can be removed.  I can do that while applying.

Yeah, I wasn't really sure whether to delete it or not. I shoulda
mentioned it under the snip line I suppose. I had it in my head that
keeping the if there made things less likely to fail if changes were
made to the Kconfig stuff in arch/riscv, but this is pretty coupled
and would likely blow up anyway.

Go for it.

Cheers,
Conor.

> 
> >         help
> >           This enables support for the Renesas RZ/Five SoC.

Patch

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 7b74de732718..adedf02897c6 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -340,10 +340,12 @@  if RISCV
 config ARCH_R9A07G043
 	bool "RISC-V Platform support for RZ/Five"
 	depends on NONPORTABLE
+	depends on RISCV_ALTERNATIVE
+	depends on RISCV_SBI
 	select ARCH_RZG2L
-	select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT
+	select AX45MP_L2_CACHE
 	select DMA_GLOBAL_POOL
-	select ERRATA_ANDES if RISCV_SBI
+	select ERRATA_ANDES
 	select ERRATA_ANDES_CMO if ERRATA_ANDES
 	help
 	  This enables support for the Renesas RZ/Five SoC.