[v1,04/14] RISC-V: paravirt: Add kconfigs

Message ID	20231205181119.207204-20-ajones@ventanamicro.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Andrew Jones <ajones@ventanamicro.com> To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH v1 04/14] RISC-V: paravirt: Add kconfigs Date: Tue, 5 Dec 2023 19:11:24 +0100 Message-ID: <20231205181119.207204-20-ajones@ventanamicro.com> In-Reply-To: <20231205181119.207204-16-ajones@ventanamicro.com> References: <20231205181119.207204-16-ajones@ventanamicro.com> MIME-Version: 1.0 Precedence: list Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	RISC-V: Add steal-time support \| expand [v1,00/14] RISC-V: Add steal-time support [v1,01/14] RISC-V: paravirt: Add skeleton for pv-time support [v1,02/14] RISC-V: Add SBI STA extension definitions [v1,03/14] RISC-V: paravirt: Implement steal-time support [v1,04/14] RISC-V: paravirt: Add kconfigs [v1,05/14] RISC-V: KVM: Add SBI STA extension skeleton [v1,06/14] RISC-V: KVM: Add steal-update vcpu request [v1,07/14] RISC-V: KVM: Add SBI STA info to vcpu_arch [v1,08/14] RISC-V: KVM: Add support for SBI extension registers [v1,09/14] RISC-V: KVM: Add support for SBI STA registers [v1,10/14] RISC-V: KVM: Implement SBI STA extension [v1,11/14] RISC-V: KVM: selftests: Move sbi_ecall to processor.c [v1,12/14] RISC-V: KVM: selftests: Add guest_sbi_probe_extension [v1,13/14] RISC-V: KVM: selftests: Add steal_time test support [v1,14/14] RISC-V: KVM: selftests: Add get-reg-list test for STA registers

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20231205181119.207204-20-ajones@ventanamicro.com (mailing list archive)

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From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org,
	linux-riscv@lists.infradead.org,
	virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org,
	atishp@atishpatra.org,
	pbonzini@redhat.com,
	paul.walmsley@sifive.com,
	palmer@dabbelt.com,
	aou@eecs.berkeley.edu,
	jgross@suse.com,
	srivatsa@csail.mit.edu,
	guoren@kernel.org,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v1 04/14] RISC-V: paravirt: Add kconfigs
Date: Tue,  5 Dec 2023 19:11:24 +0100
Message-ID: <20231205181119.207204-20-ajones@ventanamicro.com>
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Series

RISC-V: Add steal-time support | expand

Context	Check	Description
conchuod/vmtest-fixes-PR	fail	merge-conflict

Context

Check

Description

conchuod/vmtest-fixes-PR

fail

merge-conflict

Commit Message

Andrew Jones Dec. 5, 2023, 6:11 p.m. UTC

Now that we can support steal-time accounting, add the kconfig
knobs allowing it to be enabled.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

Conor Dooley Dec. 7, 2023, 2:07 p.m. UTC | #1

On Tue, Dec 05, 2023 at 07:11:24PM +0100, Andrew Jones wrote:
> Now that we can support steal-time accounting, add the kconfig
> knobs allowing it to be enabled.
> 
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

In hindsight, should this be squashed with the code actually adding the
support?

Andrew Jones Dec. 7, 2023, 2:46 p.m. UTC | #2

On Thu, Dec 07, 2023 at 02:07:28PM +0000, Conor Dooley wrote:
> On Tue, Dec 05, 2023 at 07:11:24PM +0100, Andrew Jones wrote:
> > Now that we can support steal-time accounting, add the kconfig
> > knobs allowing it to be enabled.
> > 
> > Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> In hindsight, should this be squashed with the code actually adding the
> support?

Yeah, this can be squashed, particularly because the configs are off by
default anyway. Will do.

Thanks,
drew

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 29f0f8fcb5c2..caf6f5ea578b 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -726,6 +726,25 @@  config COMPAT
 
 	  If you want to execute 32-bit userspace applications, say Y.
 
+config PARAVIRT
+	bool "Enable paravirtualization code"
+	depends on RISCV_SBI
+	help
+	  This changes the kernel so it can modify itself when it is run
+	  under a hypervisor, potentially improving performance significantly
+	  over full virtualization.
+
+config PARAVIRT_TIME_ACCOUNTING
+	bool "Paravirtual steal time accounting"
+	depends on PARAVIRT
+	help
+	  Select this option to enable fine granularity task steal time
+	  accounting. Time spent executing other tasks in parallel with
+	  the current vCPU is discounted from the vCPU power. To account for
+	  that, there can be a small performance impact.
+
+	  If in doubt, say N here.
+
 config RELOCATABLE
 	bool "Build a relocatable kernel"
 	depends on MMU && 64BIT && !XIP_KERNEL

[v1,04/14] RISC-V: paravirt: Add kconfigs

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