| Message ID | 20240128180621.85686-1-heinrich.schuchardt@canonical.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/1] dt-bindings: riscv: cpus: reg matches hart ID | expand |
On Sun, Jan 28, 2024 at 07:06:21PM +0100, Heinrich Schuchardt wrote: > Add a description to the CPU reg property to clarify that > the reg property must match the hart ID. That is the expected usage alright. Did you come across something where it was not being used in that way? Acked-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor. > > Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > index f392e367d673..fa9da59d9316 100644 > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > @@ -74,6 +74,10 @@ properties: > - riscv,sv57 > - riscv,none > > + reg: > + description: > + The hart ID of this CPU node. > + > riscv,cbom-block-size: > $ref: /schemas/types.yaml#/definitions/uint32 > description: > -- > 2.43.0 >
On 1/28/24 19:20, Conor Dooley wrote: > On Sun, Jan 28, 2024 at 07:06:21PM +0100, Heinrich Schuchardt wrote: >> Add a description to the CPU reg property to clarify that >> the reg property must match the hart ID. > > That is the expected usage alright. Did you come across something where > it was not being used in that way? No. I was simply missing it in the documentation. There is a page https://www.kernel.org/doc/Documentation/devicetree/bindings/riscv/cpus.txt but that seems not to be generated from the kernel tree. Best regards Heinrich > > Acked-by: Conor Dooley <conor.dooley@microchip.com> > > Cheers, > Conor. > >> >> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> >> --- >> Documentation/devicetree/bindings/riscv/cpus.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml >> index f392e367d673..fa9da59d9316 100644 >> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml >> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml >> @@ -74,6 +74,10 @@ properties: >> - riscv,sv57 >> - riscv,none >> >> + reg: >> + description: >> + The hart ID of this CPU node. >> + >> riscv,cbom-block-size: >> $ref: /schemas/types.yaml#/definitions/uint32 >> description: >> -- >> 2.43.0 >>
On Sun, Jan 28, 2024 at 07:23:39PM +0100, Heinrich Schuchardt wrote: > On 1/28/24 19:20, Conor Dooley wrote: > > On Sun, Jan 28, 2024 at 07:06:21PM +0100, Heinrich Schuchardt wrote: > > > Add a description to the CPU reg property to clarify that > > > the reg property must match the hart ID. > > > > That is the expected usage alright. Did you come across something where > > it was not being used in that way? > > No. I was simply missing it in the documentation. > > There is a page > https://www.kernel.org/doc/Documentation/devicetree/bindings/riscv/cpus.txt > but that seems not to be generated from the kernel tree. I think the hosted docs keep alive links files that were deleted in more recent kernels. I have no idea about the details of that though... The text binding was deleted back in 2019 in commit 4fd669a8c487 ("dt-bindings: riscv: convert cpu binding to json-schema")
On Sun, Jan 28, 2024 at 06:20:46PM +0000, Conor Dooley wrote: > On Sun, Jan 28, 2024 at 07:06:21PM +0100, Heinrich Schuchardt wrote: > > Add a description to the CPU reg property to clarify that > > the reg property must match the hart ID. > > That is the expected usage alright. Did you come across something where > it was not being used in that way? > > Acked-by: Conor Dooley <conor.dooley@microchip.com> I think I pinged Palmer to grab this, but since it's been a month and not picked up, I've gone and applied this. Thanks, Conor.
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index f392e367d673..fa9da59d9316 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -74,6 +74,10 @@ properties: - riscv,sv57 - riscv,none + reg: + description: + The hart ID of this CPU node. + riscv,cbom-block-size: $ref: /schemas/types.yaml#/definitions/uint32 description:
Add a description to the CPU reg property to clarify that the reg property must match the hart ID. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> --- Documentation/devicetree/bindings/riscv/cpus.yaml | 4 ++++ 1 file changed, 4 insertions(+)