mbox series

[GIT,PULL] RISC-V SoC driver fixes for v6.9-rc3

Message ID 20240406-botch-disband-efc69b8236be@spud (mailing list archive)
State Handled Elsewhere
Headers show
Series [GIT,PULL] RISC-V SoC driver fixes for v6.9-rc3 | expand

Pull-request

https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-soc-fixes-for-v6.9-rc3

Checks

Context Check Description
conchuod/vmtest-fixes-PR fail merge-conflict

Message

Conor Dooley April 6, 2024, 10:06 a.m. UTC 
Hey Arnd,

A single patch for ya, needed to fix boot on the JH7100.

Cheers,
Conor.

The following changes since commit 4cece764965020c22cff7665b18a012006359095:

  Linux 6.9-rc1 (2024-03-24 14:10:05 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-soc-fixes-for-v6.9-rc3

for you to fetch changes up to c90847bcbfb65d0f1c48fcc73a2b3a2d4ceac6a1:

  cache: sifive_ccache: Partially convert to a platform driver (2024-03-28 22:40:56 +0000)

----------------------------------------------------------------
RISC-V SoC driver fixes for v6.9-rc3

A fix for the ccache driver which no longer probed after the PLIC driver
was converted to a platform driver. The JH7100 SoC depends on this
driver to provide cache management ops that must be registered with an
arch_initcall, so the ccache driver is partly converted to a platform
driver, registering only the cache management ops with the initcall and
the debug/edac register provision features of the driver as a platform
driver.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

----------------------------------------------------------------
Samuel Holland (1):
      cache: sifive_ccache: Partially convert to a platform driver

 drivers/cache/sifive_ccache.c | 72 +++++++++++++++++++++++++++----------------
 1 file changed, 46 insertions(+), 26 deletions(-)