| Message ID | 20240409061043.3269676-6-debug@rivosinc.com (mailing list archive) |
|---|---|
| State | RFC |
| Headers | show |
| Series | [RFC,01/12] riscv: zicfiss / zicfilp extension csr and bit definitions | expand |
diff --git a/arch/riscv/lib/memset.S b/arch/riscv/lib/memset.S index 35f358e70bdb..e129ebf66986 100644 --- a/arch/riscv/lib/memset.S +++ b/arch/riscv/lib/memset.S @@ -56,12 +56,12 @@ SYM_FUNC_START(__memset) /* Jump into loop body */ /* Assumes 32-bit instruction lengths */ - la a5, 3f + la t2, 3f #ifdef CONFIG_64BIT srli a4, a4, 1 #endif - add a5, a5, a4 - jr a5 + add t2, t2, a4 + jr t2 3: REG_S a1, 0(t0) REG_S a1, SZREG(t0)
Handwritten `__memset` asm routine performs certain static jumps within function and uses `a5` to do that. This would require a landing pad instruction at the target. Since its static jump and no memory load is involved, use `t2` instead which is exempt from requiring a landing pad. Signed-off-by: Deepak Gupta <debug@rivosinc.com> --- arch/riscv/lib/memset.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)