Message ID | 20240618-i2c-th1520-v3-3-3042590a16b1@bootlin.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Conor Dooley |
Headers | show |
Series | Add I2C support on TH1520 | expand |
Context | Check | Description |
---|---|---|
conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Tue, Jun 18, 2024 at 09:42:40AM +0200, Thomas Bonnefille wrote: > This commit enables the I2C0 controller of the TH1520, together with > the FT24C32A EEPROM that is connected to it. > In addition, this commit also enables the I2C controllers I2C2, I2C4 > and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2, > P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4). > It also defined the required pinctrl nodes. > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 84 ++++++++++++++++++++++ > 1 file changed, 84 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > index 57a2578123eb..b5c4f1811955 100644 > --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts > @@ -122,6 +122,19 @@ led-pins { > }; > > &padctrl0_apsys { > + i2c2_pins: i2c2-0 { > + i2c-pins { > + pins = "I2C2_SDA", > + "I2C2_SCL"; > + function = "i2c"; > + bias-pull-up = <48000>; > + drive-strength = <7>; > + input-enable; > + input-schmitt-enable; > + slew-rate = <0>; > + }; > + }; > + > uart0_pins: uart0-0 { > tx-pins { > pins = "UART0_TXD"; > @@ -145,8 +158,79 @@ rx-pins { > }; > }; > > +&padctrl1_apsys { > + i2c0_pins: i2c0-0 { > + i2c-pins { > + pins = "I2C0_SDA", > + "I2C0_SCL"; > + function = "i2c"; > + bias-pull-up = <48000>; > + drive-strength = <7>; > + input-enable; > + input-schmitt-enable; > + slew-rate = <0>; > + }; > + }; > + > + i2c4_pins: i2c4-0 { > + i2c-pins { > + pins = "GPIO0_19", /* I2C4_SDA */ > + "GPIO0_18"; /* I2C4_SCL */ > + function = "i2c"; > + bias-pull-up = <48000>; > + drive-strength = <7>; > + input-enable; > + input-schmitt-enable; > + slew-rate = <0>; > + }; > + }; > + > + i2c5_pins: i2c5-0 { > + i2c-pins { > + pins = "QSPI1_D0_MOSI", /* I2C5_SDA */ > + "QSPI1_CSN0"; /* I2C5_SCL */ > + function = "i2c"; > + bias-pull-up = <48000>; > + drive-strength = <7>; > + input-enable; > + input-schmitt-enable; > + slew-rate = <0>; > + }; > + }; > +}; > + > &uart0 { > pinctrl-names = "default"; > pinctrl-0 = <&uart0_pins>; > status = "okay"; > }; > + > +&i2c0 { > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c0_pins>; > + status = "okay"; > + > + eeprom@50 { > + compatible = "atmel,24c32"; > + reg = <0x50>; > + }; > +}; > + > +&i2c2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c2_pins>; > + status = "okay"; > +}; > + > +&i2c4 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c4_pins>; > + status = "okay"; > +}; > + > +&i2c5 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c5_pins>; > + status = "okay"; > +}; > > -- > 2.45.2 > Reviewed-by: Drew Fustini <dfustini@tenstorrent.com>
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts index 57a2578123eb..b5c4f1811955 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -122,6 +122,19 @@ led-pins { }; &padctrl0_apsys { + i2c2_pins: i2c2-0 { + i2c-pins { + pins = "I2C2_SDA", + "I2C2_SCL"; + function = "i2c"; + bias-pull-up = <48000>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + uart0_pins: uart0-0 { tx-pins { pins = "UART0_TXD"; @@ -145,8 +158,79 @@ rx-pins { }; }; +&padctrl1_apsys { + i2c0_pins: i2c0-0 { + i2c-pins { + pins = "I2C0_SDA", + "I2C0_SCL"; + function = "i2c"; + bias-pull-up = <48000>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + + i2c4_pins: i2c4-0 { + i2c-pins { + pins = "GPIO0_19", /* I2C4_SDA */ + "GPIO0_18"; /* I2C4_SCL */ + function = "i2c"; + bias-pull-up = <48000>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + + i2c5_pins: i2c5-0 { + i2c-pins { + pins = "QSPI1_D0_MOSI", /* I2C5_SDA */ + "QSPI1_CSN0"; /* I2C5_SCL */ + function = "i2c"; + bias-pull-up = <48000>; + drive-strength = <7>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; status = "okay"; }; + +&i2c0 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + status = "okay"; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_pins>; + status = "okay"; +};
This commit enables the I2C0 controller of the TH1520, together with the FT24C32A EEPROM that is connected to it. In addition, this commit also enables the I2C controllers I2C2, I2C4 and I2C5 as they are all three exposed on headers (P9 19 and 20 for I2C2, P9 17 and 18 for I2C5 and MikroBus 7 and 5 for I2C4). It also defined the required pinctrl nodes. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+)