| Message ID | 20240711-sg2002-v4-4-d97ec2367095@bootlin.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add board support for Sipeed LicheeRV Nano | expand |
On Thu, Jul 11, 2024 at 12:01:31PM GMT, Thomas Bonnefille wrote: > LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO > SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet. > > Add only support for UART and SDHCI. > > Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1] > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > arch/riscv/boot/dts/sophgo/Makefile | 1 + > .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 54 ++++++++++++++++++++++ > 2 files changed, 55 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile > index 57ad82a61ea6..47d4243a8f35 100644 > --- a/arch/riscv/boot/dts/sophgo/Makefile > +++ b/arch/riscv/boot/dts/sophgo/Makefile > @@ -1,4 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0 > dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb > dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb > +dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb > dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb > diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts > new file mode 100644 > index 000000000000..fc98b6a0ddf7 > --- /dev/null > +++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts > @@ -0,0 +1,54 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> > + */ > + > +/dts-v1/; > + > +#include "sg2002.dtsi" > + > +/ { > + model = "LicheeRV Nano B"; > + compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002"; > + > + aliases { > + gpio0 = &gpio0; > + gpio1 = &gpio1; > + gpio2 = &gpio2; > + gpio3 = &gpio3; > + serial0 = &uart0; > + serial1 = &uart1; > + serial2 = &uart2; > + serial3 = &uart3; > + serial4 = &uart4; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > +}; > + > +&osc { > + clock-frequency = <25000000>; > +}; > + > +&sdhci0 { > + status = "okay"; > + bus-width = <4>; > + no-1-8-v; > + no-mmc; > + no-sdio; > + disable-wp; > +}; > + > +&uart0 { > + status = "okay"; > +}; > + > +&uart1 { > + status = "okay"; > +}; > + > +&i2c0 { > + status = "okay"; > +}; > > -- > 2.45.2 > Have you test you patch with a real board? Especially for device "uart1" and "i2c0", I suspect your configuartion does not work by default.
On 2024/8/29 13:52, Inochi Amaoto wrote: > On Thu, Jul 11, 2024 at 12:01:31PM GMT, Thomas Bonnefille wrote: >> LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO >> SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet. >> >> Add only support for UART and SDHCI. >> >> Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1] >> >> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> >> --- >> arch/riscv/boot/dts/sophgo/Makefile | 1 + >> .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 54 ++++++++++++++++++++++ >> 2 files changed, 55 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile >> index 57ad82a61ea6..47d4243a8f35 100644 >> --- a/arch/riscv/boot/dts/sophgo/Makefile >> +++ b/arch/riscv/boot/dts/sophgo/Makefile >> @@ -1,4 +1,5 @@ >> # SPDX-License-Identifier: GPL-2.0 >> dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb >> dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb >> +dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb >> dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb >> diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts >> new file mode 100644 >> index 000000000000..fc98b6a0ddf7 >> --- /dev/null >> +++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts >> @@ -0,0 +1,54 @@ >> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) >> +/* >> + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> >> + */ >> + >> +/dts-v1/; >> + >> +#include "sg2002.dtsi" >> + >> +/ { >> + model = "LicheeRV Nano B"; >> + compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002"; >> + >> + aliases { >> + gpio0 = &gpio0; >> + gpio1 = &gpio1; >> + gpio2 = &gpio2; >> + gpio3 = &gpio3; >> + serial0 = &uart0; >> + serial1 = &uart1; >> + serial2 = &uart2; >> + serial3 = &uart3; >> + serial4 = &uart4; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> +}; >> + >> +&osc { >> + clock-frequency = <25000000>; >> +}; >> + >> +&sdhci0 { >> + status = "okay"; >> + bus-width = <4>; >> + no-1-8-v; >> + no-mmc; >> + no-sdio; >> + disable-wp; >> +}; >> + >> +&uart0 { >> + status = "okay"; >> +}; >> + >> +&uart1 { >> + status = "okay"; >> +}; >> + >> +&i2c0 { >> + status = "okay"; >> +}; >> >> -- >> 2.45.2 >> > Have you test you patch with a real board? Especially > for device "uart1" and "i2c0", I suspect your > configuartion does not work by default. Hi, Thomas Bonnefille, Can you please double check and feedback, I want to confirm this before acking this change. As you know, rc6 will come next week and I'm planning a pr next week. Regards, Chen
>>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) >>> +/* >>> + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include "sg2002.dtsi" >>> + >>> +/ { >>> + model = "LicheeRV Nano B"; >>> + compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", >>> "sophgo,sg2002"; >>> + >>> + aliases { >>> + gpio0 = &gpio0; >>> + gpio1 = &gpio1; >>> + gpio2 = &gpio2; >>> + gpio3 = &gpio3; >>> + serial0 = &uart0; >>> + serial1 = &uart1; >>> + serial2 = &uart2; >>> + serial3 = &uart3; >>> + serial4 = &uart4; >>> + }; >>> + >>> + chosen { >>> + stdout-path = "serial0:115200n8"; >>> + }; >>> +}; >>> + >>> +&osc { >>> + clock-frequency = <25000000>; >>> +}; >>> + >>> +&sdhci0 { >>> + status = "okay"; >>> + bus-width = <4>; >>> + no-1-8-v; >>> + no-mmc; >>> + no-sdio; >>> + disable-wp; >>> +}; >>> + >>> +&uart0 { >>> + status = "okay"; >>> +}; >>> + >>> +&uart1 { >>> + status = "okay"; >>> +}; >>> + >>> +&i2c0 { >>> + status = "okay"; >>> +}; >>> >>> -- >>> 2.45.2 >>> >> Have you test you patch with a real board? Especially >> for device "uart1" and "i2c0", I suspect your >> configuartion does not work by default. > > Hi, Thomas Bonnefille, > > Can you please double check and feedback, I want to confirm this before > acking this change. > > As you know, rc6 will come next week and I'm planning a pr next week. > > Regards, > > Chen > Hello Chen and Inochi, I'm really sorry, indeed, those nodes certainly don't work, it was a mistake on my side introduced between v1 and v2. However, I can ensure that "uart0" and "sdhci0" are working fine. May I suggest to remove those two nodes? I can send a new iteration if it's easier for you to handle?
On 2024/8/30 16:06, Thomas Bonnefille wrote: >>>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT) >>>> +/* >>>> + * Copyright (C) 2024 Thomas Bonnefille >>>> <thomas.bonnefille@bootlin.com> >>>> + */ >>>> + >>>> +/dts-v1/; >>>> + >>>> +#include "sg2002.dtsi" >>>> + >>>> +/ { >>>> + model = "LicheeRV Nano B"; >>>> + compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", >>>> "sophgo,sg2002"; >>>> + >>>> + aliases { >>>> + gpio0 = &gpio0; >>>> + gpio1 = &gpio1; >>>> + gpio2 = &gpio2; >>>> + gpio3 = &gpio3; >>>> + serial0 = &uart0; >>>> + serial1 = &uart1; >>>> + serial2 = &uart2; >>>> + serial3 = &uart3; >>>> + serial4 = &uart4; >>>> + }; >>>> + >>>> + chosen { >>>> + stdout-path = "serial0:115200n8"; >>>> + }; >>>> +}; >>>> + >>>> +&osc { >>>> + clock-frequency = <25000000>; >>>> +}; >>>> + >>>> +&sdhci0 { >>>> + status = "okay"; >>>> + bus-width = <4>; >>>> + no-1-8-v; >>>> + no-mmc; >>>> + no-sdio; >>>> + disable-wp; >>>> +}; >>>> + >>>> +&uart0 { >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&uart1 { >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&i2c0 { >>>> + status = "okay"; >>>> +}; >>>> >>>> -- >>>> 2.45.2 >>>> >>> Have you test you patch with a real board? Especially >>> for device "uart1" and "i2c0", I suspect your >>> configuartion does not work by default. >> >> Hi, Thomas Bonnefille, >> >> Can you please double check and feedback, I want to confirm this >> before acking this change. >> >> As you know, rc6 will come next week and I'm planning a pr next week. >> >> Regards, >> >> Chen >> > Hello Chen and Inochi, > > I'm really sorry, indeed, those nodes certainly don't work, it was a > mistake on my side introduced between v1 and v2. > However, I can ensure that "uart0" and "sdhci0" are working fine. > May I suggest to remove those two nodes? I can send a new iteration if > it's easier for you to handle? I'm fine with this, just go ahead please. Thanks, Chen
On Fri, Aug 30, 2024 at 10:06:45AM GMT, Thomas Bonnefille wrote: > > > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > > > > +/* > > > > + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> > > > > + */ > > > > + > > > > +/dts-v1/; > > > > + > > > > +#include "sg2002.dtsi" > > > > + > > > > +/ { > > > > + model = "LicheeRV Nano B"; > > > > + compatible = "sipeed,licheerv-nano-b", > > > > "sipeed,licheerv-nano", "sophgo,sg2002"; > > > > + > > > > + aliases { > > > > + gpio0 = &gpio0; > > > > + gpio1 = &gpio1; > > > > + gpio2 = &gpio2; > > > > + gpio3 = &gpio3; > > > > + serial0 = &uart0; > > > > + serial1 = &uart1; > > > > + serial2 = &uart2; > > > > + serial3 = &uart3; > > > > + serial4 = &uart4; > > > > + }; > > > > + > > > > + chosen { > > > > + stdout-path = "serial0:115200n8"; > > > > + }; > > > > +}; > > > > + > > > > +&osc { > > > > + clock-frequency = <25000000>; > > > > +}; > > > > + > > > > +&sdhci0 { > > > > + status = "okay"; > > > > + bus-width = <4>; > > > > + no-1-8-v; > > > > + no-mmc; > > > > + no-sdio; > > > > + disable-wp; > > > > +}; > > > > + > > > > +&uart0 { > > > > + status = "okay"; > > > > +}; > > > > + > > > > +&uart1 { > > > > + status = "okay"; > > > > +}; > > > > + > > > > +&i2c0 { > > > > + status = "okay"; > > > > +}; > > > > > > > > -- > > > > 2.45.2 > > > > > > > Have you test you patch with a real board? Especially > > > for device "uart1" and "i2c0", I suspect your > > > configuartion does not work by default. > > > > Hi, Thomas Bonnefille, > > > > Can you please double check and feedback, I want to confirm this before > > acking this change. > > > > As you know, rc6 will come next week and I'm planning a pr next week. > > > > Regards, > > > > Chen > > > Hello Chen and Inochi, > > I'm really sorry, indeed, those nodes certainly don't work, it was a mistake > on my side introduced between v1 and v2. > However, I can ensure that "uart0" and "sdhci0" are working fine. > May I suggest to remove those two nodes? I can send a new iteration if it's > easier for you to handle? As you need a new version, please add pinctrl node and necessary pin configuration. And I will take the first two binding patch. So there is no need to add them anymore. The pinctrl patch (note it also needs a dependency): https://lore.kernel.org/all/IA1PR20MB4953DC78BB0FE0C57EA94F91BBB32@IA1PR20MB4953.namprd20.prod.outlook.com/ Regard, Inochi
On 2024/8/30 19:20, Inochi Amaoto wrote: > On Fri, Aug 30, 2024 at 10:06:45AM GMT, Thomas Bonnefille wrote: [......] >>>> Have you test you patch with a real board? Especially >>>> for device "uart1" and "i2c0", I suspect your >>>> configuartion does not work by default. >>> Hi, Thomas Bonnefille, >>> >>> Can you please double check and feedback, I want to confirm this before >>> acking this change. >>> >>> As you know, rc6 will come next week and I'm planning a pr next week. >>> >>> Regards, >>> >>> Chen >>> >> Hello Chen and Inochi, >> >> I'm really sorry, indeed, those nodes certainly don't work, it was a mistake >> on my side introduced between v1 and v2. >> However, I can ensure that "uart0" and "sdhci0" are working fine. >> May I suggest to remove those two nodes? I can send a new iteration if it's >> easier for you to handle? > As you need a new version, please add pinctrl node and necessary pin > configuration. And I will take the first two binding patch. So there > is no need to add them anymore. > > The pinctrl patch (note it also needs a dependency): > https://lore.kernel.org/all/IA1PR20MB4953DC78BB0FE0C57EA94F91BBB32@IA1PR20MB4953.namprd20.prod.outlook.com/ > > Regard, > Inochi FYI, https://lore.kernel.org/linux-riscv/MA0P287MB28228F4FC59B057DF57D9A11FE9C2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM/, I have raised a PR and included the two bindings related patches. Thomas Bonnefille, for other DTS part, please go ahead and post new version with your changes, I will raise PR after your update. Regards, Chen
diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile index 57ad82a61ea6..47d4243a8f35 100644 --- a/arch/riscv/boot/dts/sophgo/Makefile +++ b/arch/riscv/boot/dts/sophgo/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb +dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts new file mode 100644 index 000000000000..fc98b6a0ddf7 --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com> + */ + +/dts-v1/; + +#include "sg2002.dtsi" + +/ { + model = "LicheeRV Nano B"; + compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002"; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&osc { + clock-frequency = <25000000>; +}; + +&sdhci0 { + status = "okay"; + bus-width = <4>; + no-1-8-v; + no-mmc; + no-sdio; + disable-wp; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +};
LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet. Add only support for UART and SDHCI. Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1] Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> --- arch/riscv/boot/dts/sophgo/Makefile | 1 + .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 54 ++++++++++++++++++++++ 2 files changed, 55 insertions(+)