Message ID | 20240801-th1520-clk-dts-v1-6-71077a0614b8@pdp7.com (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show |
Series | riscv: dts: thead: Enable TH1520 AP_SUBSYS clock controller | expand |
Context | Check | Description |
---|---|---|
conchuod/vmtest-fixes-PR | fail | merge-conflict |
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts index 425f07d73b32..497d961456f3 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -45,10 +45,6 @@ &osc_32k { clock-frequency = <32768>; }; -&spi_clk { - clock-frequency = <396000000>; -}; - &dmac0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi index 077dbbe4abb6..78977bdbbe3d 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi @@ -25,10 +25,6 @@ &osc_32k { clock-frequency = <32768>; }; -&spi_clk { - clock-frequency = <396000000>; -}; - &dmac0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 5f4f94ca9cc7..6992060e6a54 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -216,12 +216,6 @@ osc_32k: 32k-oscillator { #clock-cells = <0>; }; - spi_clk: spi-clock { - compatible = "fixed-clock"; - clock-output-names = "spi_clk"; - #clock-cells = <0>; - }; - soc { compatible = "simple-bus"; interrupt-parent = <&plic>; @@ -256,7 +250,7 @@ spi0: spi@ffe700c000 { compatible = "thead,th1520-spi", "snps,dw-apb-ssi"; reg = <0xff 0xe700c000 0x0 0x1000>; interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&spi_clk>; + clocks = <&clk CLK_SPI>; #address-cells = <1>; #size-cells = <0>; status = "disabled";