| Message ID | 20240806-riding-spinach-8cae90d6e05f@spud (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | MAINTAINERS: invert Misc RISC-V SoC Support's pattern | expand |
From: Conor Dooley <conor.dooley@microchip.com> On Tue, 06 Aug 2024 18:36:21 +0100, Conor Dooley wrote: > There are now more directories that someone else maintains than ones I > do, so invert the pattern to cover included, rather than included > directories. Ditto for the bindings directory - there's more files there > that are the responsibility of others than mine (and I get CCed on all > bindings anyway). Remove it from the entry. > > > [...] Applied to riscv-dt-fixes, thanks! [1/1] MAINTAINERS: invert Misc RISC-V SoC Support's pattern https://git.kernel.org/conor/c/7d9d88890f04 Thanks, Conor.
diff --git a/MAINTAINERS b/MAINTAINERS index 42decde38320..6ed3c8ec9005 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19653,12 +19653,10 @@ L: linux-riscv@lists.infradead.org S: Maintained Q: https://patchwork.kernel.org/project/linux-riscv/list/ T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ -F: Documentation/devicetree/bindings/riscv/ -F: arch/riscv/boot/dts/ -X: arch/riscv/boot/dts/allwinner/ -X: arch/riscv/boot/dts/renesas/ -X: arch/riscv/boot/dts/sophgo/ -X: arch/riscv/boot/dts/thead/ +F: arch/riscv/boot/dts/canaan/ +F: arch/riscv/boot/dts/microchip/ +F: arch/riscv/boot/dts/sifive/ +F: arch/riscv/boot/dts/starfive/ RISC-V PMU DRIVERS M: Atish Patra <atishp@atishpatra.org>