| Message ID | 20240909095557.446745-1-zhangchunyan@iscas.ac.cn (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: Remove duplicated GET_RM | expand |
Hi Chunyan, On 09/09/2024 11:55, Chunyan Zhang wrote: > The macro GET_RM defined twice in this file, one can be removed. > > Signed-off-by: Chunyan Zhang <zhangchunyan@iscas.ac.cn> > --- > arch/riscv/kernel/traps_misaligned.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c > index b62d5a2f4541..2a9b72dcd648 100644 > --- a/arch/riscv/kernel/traps_misaligned.c > +++ b/arch/riscv/kernel/traps_misaligned.c > @@ -136,8 +136,6 @@ > #define REG_PTR(insn, pos, regs) \ > (ulong *)((ulong)(regs) + REG_OFFSET(insn, pos)) > > -#define GET_RM(insn) (((insn) >> 12) & 7) > - > #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) > #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) > #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs)) Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Thanks, Alex
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c index b62d5a2f4541..2a9b72dcd648 100644 --- a/arch/riscv/kernel/traps_misaligned.c +++ b/arch/riscv/kernel/traps_misaligned.c @@ -136,8 +136,6 @@ #define REG_PTR(insn, pos, regs) \ (ulong *)((ulong)(regs) + REG_OFFSET(insn, pos)) -#define GET_RM(insn) (((insn) >> 12) & 7) - #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
The macro GET_RM defined twice in this file, one can be removed. Signed-off-by: Chunyan Zhang <zhangchunyan@iscas.ac.cn> --- arch/riscv/kernel/traps_misaligned.c | 2 -- 1 file changed, 2 deletions(-)