diff mbox series

riscv: dts: starfive: jh7110-common: Use named definition for mmc1 card detect

Message ID 20241210040652.164030-1-e@freeshell.de (mailing list archive)
State Accepted
Headers show
Series riscv: dts: starfive: jh7110-common: Use named definition for mmc1 card detect | expand

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Context Check Description
conchuod/vmtest-for-next-PR success PR summary
conchuod/patch-1-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh took 164.43s
conchuod/patch-1-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh took 1021.83s
conchuod/patch-1-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh took 1183.56s
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conchuod/patch-1-test-10 success .github/scripts/patches/tests/module_param.sh took 0.01s
conchuod/patch-1-test-11 success .github/scripts/patches/tests/verify_fixes.sh took 0.01s
conchuod/patch-1-test-12 success .github/scripts/patches/tests/verify_signedoff.sh took 0.02s

Commit Message

E Shattow Dec. 10, 2024, 4:06 a.m. UTC 
Use named definition for mmc1 card detect GPIO instead of numeric literal.

Fixes: ac9a37e2d6b63 ("riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards")
Signed-off-by: E Shattow <e@freeshell.de>
---
 arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


base-commit: 708d55db3edbe2ccf88d94b5f2e2b404bc0ba37c

Comments

Conor Dooley Dec. 16, 2024, 8:11 p.m. UTC | #1 
On Mon, Dec 09, 2024 at 08:06:46PM -0800, E Shattow wrote:
> Use named definition for mmc1 card detect GPIO instead of numeric literal.
> 
> Fixes: ac9a37e2d6b63 ("riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards")

I don't think this is a fix. Don't resend for that, I'll remove the tag.

> Signed-off-by: E Shattow <e@freeshell.de>
> ---
>  arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> index 48fb5091b817..12a90d38ab31 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> @@ -281,7 +281,7 @@ &mmc1 {
>  	bus-width = <4>;
>  	no-sdio;
>  	no-mmc;
> -	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> +	cd-gpios = <&sysgpio GPI_SYS_SDIO1_CD GPIO_ACTIVE_LOW>;
>  	disable-wp;
>  	cap-sd-highspeed;
>  	post-power-on-delay-ms = <200>;
> 
> base-commit: 708d55db3edbe2ccf88d94b5f2e2b404bc0ba37c
> -- 
> 2.45.2
>
Conor Dooley Dec. 16, 2024, 8:12 p.m. UTC | #2 
From: Conor Dooley <conor.dooley@microchip.com>

On Mon, 09 Dec 2024 20:06:46 -0800, E Shattow wrote:
> Use named definition for mmc1 card detect GPIO instead of numeric literal.
> 
> 

Applied to riscv-dt-for-next, thanks!

[1/1] riscv: dts: starfive: jh7110-common: Use named definition for mmc1 card detect
      https://git.kernel.org/conor/c/c96f15d79172

Thanks,
Conor.
Hal Feng Dec. 17, 2024, 2:02 a.m. UTC | #3 
> On 17.12.24 04:13, Conor Dooley wrote: 
> On Mon, 09 Dec 2024 20:06:46 -0800, E Shattow wrote:
> > Use named definition for mmc1 card detect GPIO instead of numeric literal.
> >
> >
> 
> Applied to riscv-dt-for-next, thanks!
> 
> [1/1] riscv: dts: starfive: jh7110-common: Use named definition for mmc1
> card detect
>       https://git.kernel.org/conor/c/c96f15d79172

No, here "41" means the GPIO number, but GPI_SYS_SDIO1_CD means the
multiplexed function and should be used by pinctrl pinmux not gpio subsystem.
Although GPI-SYS_SDIO1_CD is numerically the same as 41.

Best regards,
Hal
E Shattow Dec. 17, 2024, 3:25 a.m. UTC | #4 
Hi, Hal

On 12/16/24 18:02, Hal Feng wrote:
>> On 17.12.24 04:13, Conor Dooley wrote:
>> On Mon, 09 Dec 2024 20:06:46 -0800, E Shattow wrote:
>>> Use named definition for mmc1 card detect GPIO instead of numeric literal.
>>>
>>>
>>
>> Applied to riscv-dt-for-next, thanks!
>>
>> [1/1] riscv: dts: starfive: jh7110-common: Use named definition for mmc1
>> card detect
>>        https://git.kernel.org/conor/c/c96f15d79172
> 
> No, here "41" means the GPIO number, but GPI_SYS_SDIO1_CD means the
> multiplexed function and should be used by pinctrl pinmux not gpio subsystem.
> Although GPI-SYS_SDIO1_CD is numerically the same as 41.
> 
> Best regards,
> Hal

You're right, Hal. I'm confused trying to make sense of this.

 From dts/upstream/src/riscv/starfive/jh7110-pinfunc.h:

"gpio nr:  gpio number, 0 - 63"

And yet in dts/upstream/src/riscv/starfive/jh7110-common.dtsi there's:

 >                        pinmux = <PINMUX(64, 0)>,
 >                                 <PINMUX(65, 0)>,
 >                                 <PINMUX(66, 0)>,
 >                                 <PINMUX(67, 0)>,
 >                                 <PINMUX(68, 0)>,
 >                                 <PINMUX(69, 0)>,
 >                                 <PINMUX(70, 0)>,
 >                                 <PINMUX(71, 0)>,
 >                                 <PINMUX(72, 0)>,
 >                                 <PINMUX(73, 0)>;


Loosely on the subject of MMC interface and GPIO numbering, what is the 
above code doing? These are not GPIO numbers 0-63 so what is this?

I'm trying to understand this so I can write the Mars CM (-Lite) dts.

Conor, and Hal: sorry for the mistake there.

-E
Conor Dooley Dec. 17, 2024, 6:33 p.m. UTC | #5 
On Mon, Dec 16, 2024 at 07:25:59PM -0800, E Shattow wrote:
> Hi, Hal
> 
> On 12/16/24 18:02, Hal Feng wrote:
> > > On 17.12.24 04:13, Conor Dooley wrote:
> > > On Mon, 09 Dec 2024 20:06:46 -0800, E Shattow wrote:
> > > > Use named definition for mmc1 card detect GPIO instead of numeric literal.
> > > > 
> > > > 
> > > 
> > > Applied to riscv-dt-for-next, thanks!
> > > 
> > > [1/1] riscv: dts: starfive: jh7110-common: Use named definition for mmc1
> > > card detect
> > >        https://git.kernel.org/conor/c/c96f15d79172
> > 
> > No, here "41" means the GPIO number, but GPI_SYS_SDIO1_CD means the
> > multiplexed function and should be used by pinctrl pinmux not gpio subsystem.
> > Although GPI-SYS_SDIO1_CD is numerically the same as 41.
> > 
> > Best regards,
> > Hal
> 
> You're right, Hal. I'm confused trying to make sense of this.
> 
> From dts/upstream/src/riscv/starfive/jh7110-pinfunc.h:
> 
> "gpio nr:  gpio number, 0 - 63"
> 
> And yet in dts/upstream/src/riscv/starfive/jh7110-common.dtsi there's:
> 
> >                        pinmux = <PINMUX(64, 0)>,
> >                                 <PINMUX(65, 0)>,
> >                                 <PINMUX(66, 0)>,
> >                                 <PINMUX(67, 0)>,
> >                                 <PINMUX(68, 0)>,
> >                                 <PINMUX(69, 0)>,
> >                                 <PINMUX(70, 0)>,
> >                                 <PINMUX(71, 0)>,
> >                                 <PINMUX(72, 0)>,
> >                                 <PINMUX(73, 0)>;
> 
> 
> Loosely on the subject of MMC interface and GPIO numbering, what is the
> above code doing? These are not GPIO numbers 0-63 so what is this?
> 
> I'm trying to understand this so I can write the Mars CM (-Lite) dts.
> 


> Conor, and Hal: sorry for the mistake there.

No worries, I've dropped the patch.
E Shattow Dec. 19, 2024, 9:41 a.m. UTC | #6 
On 12/17/24 10:33, Conor Dooley wrote:
> On Mon, Dec 16, 2024 at 07:25:59PM -0800, E Shattow wrote:
>> Hi, Hal
>>
>> On 12/16/24 18:02, Hal Feng wrote:
>>>> On 17.12.24 04:13, Conor Dooley wrote:
>>>> On Mon, 09 Dec 2024 20:06:46 -0800, E Shattow wrote:
>>>>> Use named definition for mmc1 card detect GPIO instead of numeric literal.
>>>>>
>>>>>
>>>>
>>>> Applied to riscv-dt-for-next, thanks!
>>>>
>>>> [1/1] riscv: dts: starfive: jh7110-common: Use named definition for mmc1
>>>> card detect
>>>>         https://git.kernel.org/conor/c/c96f15d79172
>>>
>>> No, here "41" means the GPIO number, but GPI_SYS_SDIO1_CD means the
>>> multiplexed function and should be used by pinctrl pinmux not gpio subsystem.
>>> Although GPI-SYS_SDIO1_CD is numerically the same as 41.
>>>
>>> Best regards,
>>> Hal
>>
>> You're right, Hal. I'm confused trying to make sense of this.
>>
>>  From dts/upstream/src/riscv/starfive/jh7110-pinfunc.h:
>>
>> "gpio nr:  gpio number, 0 - 63"
>>
>> And yet in dts/upstream/src/riscv/starfive/jh7110-common.dtsi there's:
>>
>>>                         pinmux = <PINMUX(64, 0)>,
>>>                                  <PINMUX(65, 0)>,
>>>                                  <PINMUX(66, 0)>,
>>>                                  <PINMUX(67, 0)>,
>>>                                  <PINMUX(68, 0)>,
>>>                                  <PINMUX(69, 0)>,
>>>                                  <PINMUX(70, 0)>,
>>>                                  <PINMUX(71, 0)>,
>>>                                  <PINMUX(72, 0)>,
>>>                                  <PINMUX(73, 0)>;
>>
>>
>> Loosely on the subject of MMC interface and GPIO numbering, what is the
>> above code doing? These are not GPIO numbers 0-63 so what is this?
>>
>> I'm trying to understand this so I can write the Mars CM (-Lite) dts.
>>
> 
> 
>> Conor, and Hal: sorry for the mistake there.
> 
> No worries, I've dropped the patch.

Okay. I was able to find pad definitions in the vendor Linux source: 
https://github.com/starfive-tech/linux/blob/5dfc879916d946dcc2521ef1eccd1d8bfb06a75e/include/dt-bindings/pinctrl/starfive%2Cjh7110-pinfunc.h

There are definitions for GPIO indexes beyond 0-63:

 > #define   PAD_SD0_CLK     64
 > #define   PAD_SD0_CMD     65
 > #define   PAD_SD0_DATA0   66
 > #define   PAD_SD0_DATA1   67
 > #define   PAD_SD0_DATA2   68
 > #define   PAD_SD0_DATA3   69
 > #define   PAD_SD0_DATA4   70
 > #define   PAD_SD0_DATA5   71
 > #define   PAD_SD0_DATA6   72
 > #define   PAD_SD0_DATA7   73
 > #define   PAD_SD0_STRB    74
 > #define   PAD_GMAC1_MDC   75
 > #define   PAD_GMAC1_MDIO  76
 > #define   PAD_GMAC1_RXD0  77
 > #define   PAD_GMAC1_RXD1  78
 > #define   PAD_GMAC1_RXD2  79
 > #define   PAD_GMAC1_RXD3  80
 > #define   PAD_GMAC1_RXDV  81
 > #define   PAD_GMAC1_RXC   82
 > #define   PAD_GMAC1_TXD0  83
 > #define   PAD_GMAC1_TXD1  84
 > #define   PAD_GMAC1_TXD2  85
 > #define   PAD_GMAC1_TXD3  86
 > #define   PAD_GMAC1_TXEN  87
 > #define   PAD_GMAC1_TXC   88
 > #define   PAD_QSPI_SCLK   89
 > #define   PAD_QSPI_CSn0   90
 > #define   PAD_QSPI_DATA0  91
 > #define   PAD_QSPI_DATA1  92
 > #define   PAD_QSPI_DATA2  93
 > #define   PAD_QSPI_DATA3  94

Where I got lost is that these are in mainline with 
include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h

I did not find these pad definitions above index 63 mentioned in the 
JH7110 Technical Reference Manual.

Is it worth sending a patch to use those definitions in jh7110-common.dtsi?

-E
Hal Feng Dec. 21, 2024, 4:15 a.m. UTC | #7 
> On 19.12.24 17:42, E Shattow wrote: 
> On 12/17/24 10:33, Conor Dooley wrote:
> > On Mon, Dec 16, 2024 at 07:25:59PM -0800, E Shattow wrote:
> >> Hi, Hal
> >>
> >> On 12/16/24 18:02, Hal Feng wrote:
> >>>> On 17.12.24 04:13, Conor Dooley wrote:
> >>>> On Mon, 09 Dec 2024 20:06:46 -0800, E Shattow wrote:
> >>>>> Use named definition for mmc1 card detect GPIO instead of numeric
> literal.
> >>>>>
> >>>>>
> >>>>
> >>>> Applied to riscv-dt-for-next, thanks!
> >>>>
> >>>> [1/1] riscv: dts: starfive: jh7110-common: Use named definition for
> >>>> mmc1 card detect
> >>>>         https://git.kernel.org/conor/c/c96f15d79172
> >>>
> >>> No, here "41" means the GPIO number, but GPI_SYS_SDIO1_CD means
> the
> >>> multiplexed function and should be used by pinctrl pinmux not gpio
> subsystem.
> >>> Although GPI-SYS_SDIO1_CD is numerically the same as 41.
> >>>
> >>> Best regards,
> >>> Hal
> >>
> >> You're right, Hal. I'm confused trying to make sense of this.
> >>
> >>  From dts/upstream/src/riscv/starfive/jh7110-pinfunc.h:
> >>
> >> "gpio nr:  gpio number, 0 - 63"

This place needs to be updated.

For sysgpio: 
gpio nr:  gpio number, 0 - 63 when using GPIOMUX(n, ...),
                6 - 63 or 82 when using PINMUX(n, 1 or 2),  64 - 74 or 89 - 94 when using PINMUX(n, 0)

For aongpio: 
gpio nr:  gpio number, 0 - 3 when using GPIOMUX(n, ...),
                0 - 5 when using PINMUX(n, 0)

> >>
> >> And yet in dts/upstream/src/riscv/starfive/jh7110-common.dtsi there's:
> >>
> >>>                         pinmux = <PINMUX(64, 0)>,
> >>>                                  <PINMUX(65, 0)>,
> >>>                                  <PINMUX(66, 0)>,
> >>>                                  <PINMUX(67, 0)>,
> >>>                                  <PINMUX(68, 0)>,
> >>>                                  <PINMUX(69, 0)>,
> >>>                                  <PINMUX(70, 0)>,
> >>>                                  <PINMUX(71, 0)>,
> >>>                                  <PINMUX(72, 0)>,
> >>>                                  <PINMUX(73, 0)>;
> >>
> >>
> >> Loosely on the subject of MMC interface and GPIO numbering, what is
> >> the above code doing? These are not GPIO numbers 0-63 so what is this?
> >>
> >> I'm trying to understand this so I can write the Mars CM (-Lite) dts.
> >>
> >
> >
> >> Conor, and Hal: sorry for the mistake there.
> >
> > No worries, I've dropped the patch.
> 
> Okay. I was able to find pad definitions in the vendor Linux source:
> https://github.com/starfive-
> tech/linux/blob/5dfc879916d946dcc2521ef1eccd1d8bfb06a75e/include/dt-
> bindings/pinctrl/starfive%2Cjh7110-pinfunc.h
> 
> There are definitions for GPIO indexes beyond 0-63:
> 
>  > #define   PAD_SD0_CLK     64
>  > #define   PAD_SD0_CMD     65
>  > #define   PAD_SD0_DATA0   66
>  > #define   PAD_SD0_DATA1   67
>  > #define   PAD_SD0_DATA2   68
>  > #define   PAD_SD0_DATA3   69
>  > #define   PAD_SD0_DATA4   70
>  > #define   PAD_SD0_DATA5   71
>  > #define   PAD_SD0_DATA6   72
>  > #define   PAD_SD0_DATA7   73
>  > #define   PAD_SD0_STRB    74
>  > #define   PAD_GMAC1_MDC   75
>  > #define   PAD_GMAC1_MDIO  76
>  > #define   PAD_GMAC1_RXD0  77
>  > #define   PAD_GMAC1_RXD1  78
>  > #define   PAD_GMAC1_RXD2  79
>  > #define   PAD_GMAC1_RXD3  80
>  > #define   PAD_GMAC1_RXDV  81
>  > #define   PAD_GMAC1_RXC   82
>  > #define   PAD_GMAC1_TXD0  83
>  > #define   PAD_GMAC1_TXD1  84
>  > #define   PAD_GMAC1_TXD2  85
>  > #define   PAD_GMAC1_TXD3  86
>  > #define   PAD_GMAC1_TXEN  87
>  > #define   PAD_GMAC1_TXC   88
>  > #define   PAD_QSPI_SCLK   89
>  > #define   PAD_QSPI_CSn0   90
>  > #define   PAD_QSPI_DATA0  91
>  > #define   PAD_QSPI_DATA1  92
>  > #define   PAD_QSPI_DATA2  93
>  > #define   PAD_QSPI_DATA3  94

Yes, these pins with indexes beyond 0-63 are actually existed and
they are set to unchangeable fixed functions.

> 
> Where I got lost is that these are in mainline with include/dt-
> bindings/pinctrl/starfive,jh7110-pinctrl.h
> 
> I did not find these pad definitions above index 63 mentioned in the
> JH7110 Technical Reference Manual.
> 
> Is it worth sending a patch to use those definitions in jh7110-common.dtsi?

Yeah, actually it will be more readable to use the definitions to replace pin 64~94.

Best regards,
Hal
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 48fb5091b817..12a90d38ab31 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -281,7 +281,7 @@  &mmc1 {
 	bus-width = <4>;
 	no-sdio;
 	no-mmc;
-	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+	cd-gpios = <&sysgpio GPI_SYS_SDIO1_CD GPIO_ACTIVE_LOW>;
 	disable-wp;
 	cap-sd-highspeed;
 	post-power-on-delay-ms = <200>;