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[RFC,4/5] RISC-V: ACPI: define arch_apei_get_mem_attribute

Message ID 20250206131926.91289-5-qirui.001@bytedance.com (mailing list archive)
State New
Headers show
Series riscv: initial support for Generic Hardware Error Source (GHES) | expand

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Commit Message

Rui Qi Feb. 6, 2025, 1:19 p.m. UTC 
From: Rui Qi <qirui.001@bytedance.com>

we need arch_apei_get_mem_attribute to get protection bits
for a given physical address. These protection
bits are then used to map the physical address.

Signed-off-by: Rui Qi <qirui.001@bytedance.com>
---
 arch/riscv/include/asm/acpi.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h
index 6e13695120bc..c35dd4e5a84d 100644
--- a/arch/riscv/include/asm/acpi.h
+++ b/arch/riscv/include/asm/acpi.h
@@ -90,6 +90,24 @@  static inline void acpi_get_cbo_block_size(struct acpi_table_header *table,
 
 #endif /* CONFIG_ACPI */
 
+#ifdef CONFIG_ACPI_APEI
+/*
+ * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
+ * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
+ * with a kernel command line parameter "acpi=nocmcoff". But we don't
+ * have this IA-32 specific feature on RISC-V, this definition is only
+ * for compatibility.
+ */
+#define acpi_disable_cmcff 1
+static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
+{
+	return PAGE_KERNEL_IO;
+}
+
+#else
+#define acpi_disable_cmcff 0
+#endif
+
 #ifdef CONFIG_ACPI_NUMA
 void acpi_map_cpus_to_nodes(void);
 #else