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[9/9] riscv: Add Ventana unaligned access table entries

Message ID 20250207161939.46139-20-ajones@ventanamicro.com (mailing list archive)
State Superseded
Headers show
Series riscv: Unaligned access speed probing fixes and skipping | expand

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Commit Message

Andrew Jones Feb. 7, 2025, 4:19 p.m. UTC 
Ventana harts always have fast unaligned access speeds, so skip the
unnecessary probing.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/include/asm/vendorid_list.h     | 1 +
 arch/riscv/kernel/unaligned_access_speed.c | 3 +++
 2 files changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
index a5150cdf34d8..8dd55a847893 100644
--- a/arch/riscv/include/asm/vendorid_list.h
+++ b/arch/riscv/include/asm/vendorid_list.h
@@ -9,5 +9,6 @@ 
 #define MICROCHIP_VENDOR_ID	0x029
 #define SIFIVE_VENDOR_ID	0x489
 #define THEAD_VENDOR_ID		0x5b7
+#define VENTANA_VENDOR_ID	0x61f
 
 #endif
diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c
index bd6db4c42daf..ff9905274c60 100644
--- a/arch/riscv/kernel/unaligned_access_speed.c
+++ b/arch/riscv/kernel/unaligned_access_speed.c
@@ -14,6 +14,7 @@ 
 #include <asm/hwprobe.h>
 #include <asm/sbi.h>
 #include <asm/vector.h>
+#include <asm/vendorid_list.h>
 
 #include "copy-unaligned.h"
 
@@ -251,6 +252,7 @@  struct unaligned_access_table_entry {
 };
 
 static struct unaligned_access_table_entry unaligned_access_table_entries[] = {
+	{ LEVEL_VENDOR, VENTANA_VENDOR_ID, 0, 0, RISCV_HWPROBE_MISALIGNED_SCALAR_FAST },
 };
 
 /*
@@ -460,6 +462,7 @@  static int __init vec_check_unaligned_access_speed_all_cpus(void *unused __alway
 #endif
 
 static struct unaligned_access_table_entry vec_unaligned_access_table_entries[] = {
+	{ LEVEL_VENDOR, VENTANA_VENDOR_ID, 0, 0, RISCV_HWPROBE_MISALIGNED_VECTOR_FAST },
 };
 
 static bool check_vector_unaligned_access_table(void)