| Message ID | 20250311073432.4068512-6-pinkesh.vaghela@einfochips.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Basic device tree support for ESWIN EIC7700 RISC-V SoC | expand |
| Context | Check | Description |
|---|---|---|
| bjorn/pre-ci_am | success | Success |
| bjorn/build-rv32-defconfig | success | build-rv32-defconfig |
| bjorn/build-rv64-clang-allmodconfig | success | build-rv64-clang-allmodconfig |
| bjorn/build-rv64-gcc-allmodconfig | success | build-rv64-gcc-allmodconfig |
| bjorn/build-rv64-nommu-k210-defconfig | success | build-rv64-nommu-k210-defconfig |
| bjorn/build-rv64-nommu-k210-virt | success | build-rv64-nommu-k210-virt |
| bjorn/checkpatch | success | checkpatch |
| bjorn/dtb-warn-rv64 | success | dtb-warn-rv64 |
| bjorn/header-inline | success | header-inline |
| bjorn/kdoc | success | kdoc |
| bjorn/module-param | success | module-param |
| bjorn/verify-fixes | success | verify-fixes |
| bjorn/verify-signedoff | success | verify-signedoff |
On Tue, Mar 11, 2025 at 01:04:27PM +0530, Pinkesh Vaghela wrote: > From: Pritesh Patel <pritesh.patel@einfochips.com> > > This cache controller is also used on the ESWIN EIC7700 SoC. > However, it have 256KB private L2 Cache and shared L3 Cache of 4MB. > So add dedicated compatible string for it. > > Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com> > Reviewed-by: Samuel Holland <samuel.holland@sifive.com> > Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> > --- > .../bindings/cache/sifive,ccache0.yaml | 28 +++++++++++++++++-- > 1 file changed, 25 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > index 7e8cebe21584..11e9df2cd153 100644 > --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > @@ -39,6 +39,7 @@ properties: > - const: cache > - items: > - enum: > + - eswin,eic7700-l3-cache > - starfive,jh7100-ccache > - starfive,jh7110-ccache > - const: sifive,ccache0 > @@ -55,10 +56,10 @@ properties: > enum: [2, 3] > > cache-sets: > - enum: [1024, 2048] > + enum: [1024, 2048, 4096] > > cache-size: > - const: 2097152 > + enum: [2097152, 4194304] Making this an enum makes either value permitted on each SoC. Can you add cache-size restrictions to the if statements below to keep it restricted to the correct value please? Cheers, Conor. > > cache-unified: true > > @@ -89,6 +90,7 @@ allOf: > compatible: > contains: > enum: > + - eswin,eic7700-l3-cache > - sifive,fu740-c000-ccache > - starfive,jh7100-ccache > - starfive,jh7110-ccache > @@ -122,11 +124,31 @@ allOf: > cache-sets: > const: 2048 > > - else: > + - if: > + properties: > + compatible: > + contains: > + enum: > + - microchip,mpfs-ccache > + - sifive,fu540-c000-ccache > + > + then: > properties: > cache-sets: > const: 1024 > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - eswin,eic7700-l3-cache > + > + then: > + properties: > + cache-sets: > + const: 4096 > + > - if: > properties: > compatible: > -- > 2.25.1 >
Hi Conor, On Tue, Mar 11, 2025 at 06:11:43PM +0530, Conor Dooley wrote: > On Tue, Mar 11, 2025 at 01:04:27PM +0530, Pinkesh Vaghela wrote: > > From: Pritesh Patel <pritesh.patel@einfochips.com> > > > > This cache controller is also used on the ESWIN EIC7700 SoC. > > However, it have 256KB private L2 Cache and shared L3 Cache of 4MB. > > So add dedicated compatible string for it. > > > > Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com> > > Reviewed-by: Samuel Holland <samuel.holland@sifive.com> > > Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> > > --- > > .../bindings/cache/sifive,ccache0.yaml | 28 +++++++++++++++++-- > > 1 file changed, 25 insertions(+), 3 deletions(-) > > > > diff --git > > a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > > b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > > index 7e8cebe21584..11e9df2cd153 100644 > > --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > > +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml > > @@ -39,6 +39,7 @@ properties: > > - const: cache > > - items: > > - enum: > > + - eswin,eic7700-l3-cache > > - starfive,jh7100-ccache > > - starfive,jh7110-ccache > > - const: sifive,ccache0 > > @@ -55,10 +56,10 @@ properties: > > enum: [2, 3] > > > > cache-sets: > > - enum: [1024, 2048] > > + enum: [1024, 2048, 4096] > > > > cache-size: > > - const: 2097152 > > + enum: [2097152, 4194304] > > Making this an enum makes either value permitted on each SoC. Can you add > cache-size restrictions to the if statements below to keep it restricted to the > correct value please? > > Cheers, > Conor. Thanks for the feedback. I will address this in v2. Regards, Pinkesh > > > > > cache-unified: true > > > > @@ -89,6 +90,7 @@ allOf: > > compatible: > > contains: > > enum: > > + - eswin,eic7700-l3-cache > > - sifive,fu740-c000-ccache > > - starfive,jh7100-ccache > > - starfive,jh7110-ccache @@ -122,11 +124,31 @@ allOf: > > cache-sets: > > const: 2048 > > > > - else: > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - microchip,mpfs-ccache > > + - sifive,fu540-c000-ccache > > + > > + then: > > properties: > > cache-sets: > > const: 1024 > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - eswin,eic7700-l3-cache > > + > > + then: > > + properties: > > + cache-sets: > > + const: 4096 > > + > > - if: > > properties: > > compatible: > > -- > > 2.25.1 > >
diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index 7e8cebe21584..11e9df2cd153 100644 --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -39,6 +39,7 @@ properties: - const: cache - items: - enum: + - eswin,eic7700-l3-cache - starfive,jh7100-ccache - starfive,jh7110-ccache - const: sifive,ccache0 @@ -55,10 +56,10 @@ properties: enum: [2, 3] cache-sets: - enum: [1024, 2048] + enum: [1024, 2048, 4096] cache-size: - const: 2097152 + enum: [2097152, 4194304] cache-unified: true @@ -89,6 +90,7 @@ allOf: compatible: contains: enum: + - eswin,eic7700-l3-cache - sifive,fu740-c000-ccache - starfive,jh7100-ccache - starfive,jh7110-ccache @@ -122,11 +124,31 @@ allOf: cache-sets: const: 2048 - else: + - if: + properties: + compatible: + contains: + enum: + - microchip,mpfs-ccache + - sifive,fu540-c000-ccache + + then: properties: cache-sets: const: 1024 + - if: + properties: + compatible: + contains: + enum: + - eswin,eic7700-l3-cache + + then: + properties: + cache-sets: + const: 4096 + - if: properties: compatible: