diff mbox series

[RFC,V3,07/43] rv64ilp32_abi: riscv: arch_hweight: Adapt cpopw & cpop of zbb extension

Message ID 20250325121624.523258-8-guoren@kernel.org (mailing list archive)
State New
Headers show
Series rv64ilp32_abi: Build CONFIG_64BIT kernel-self with ILP32 ABI | expand

Checks

Context Check Description
bjorn/pre-ci_am success Success
bjorn/build-rv32-defconfig fail build-rv32-defconfig
bjorn/build-rv64-clang-allmodconfig fail build-rv64-clang-allmodconfig
bjorn/build-rv64-gcc-allmodconfig fail build-rv64-gcc-allmodconfig
bjorn/build-rv64-nommu-k210-defconfig success build-rv64-nommu-k210-defconfig
bjorn/build-rv64-nommu-k210-virt success build-rv64-nommu-k210-virt
bjorn/checkpatch success checkpatch
bjorn/dtb-warn-rv64 success dtb-warn-rv64
bjorn/header-inline success header-inline
bjorn/kdoc success kdoc
bjorn/module-param success module-param
bjorn/verify-fixes success verify-fixes
bjorn/verify-signedoff success verify-signedoff

Commit Message

Guo Ren March 25, 2025, 12:15 p.m. UTC 
From: "Guo Ren (Alibaba DAMO Academy)" <guoren@kernel.org>

The RV64ILP32 ABI is based on 64-bit ISA, but BITS_PER_LONG is 32.
Use cpopw for u32_weight and cpop for u64_weight.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
---
 arch/riscv/include/asm/arch_hweight.h | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/arch_hweight.h b/arch/riscv/include/asm/arch_hweight.h
index 613769b9cdc9..42577965f5bb 100644
--- a/arch/riscv/include/asm/arch_hweight.h
+++ b/arch/riscv/include/asm/arch_hweight.h
@@ -12,7 +12,11 @@ 
 #if (BITS_PER_LONG == 64)
 #define CPOPW	"cpopw "
 #elif (BITS_PER_LONG == 32)
+#ifdef CONFIG_64BIT
+#define CPOPW	"cpopw "
+#else
 #define CPOPW	"cpop "
+#endif
 #else
 #error "Unexpected BITS_PER_LONG"
 #endif
@@ -47,7 +51,7 @@  static inline unsigned int __arch_hweight8(unsigned int w)
 	return __arch_hweight32(w & 0xff);
 }
 
-#if BITS_PER_LONG == 64
+#ifdef CONFIG_64BIT
 static __always_inline unsigned long __arch_hweight64(__u64 w)
 {
 # ifdef CONFIG_RISCV_ISA_ZBB
@@ -61,7 +65,7 @@  static __always_inline unsigned long __arch_hweight64(__u64 w)
 	     ".option pop\n"
 	     : "=r" (w) : "r" (w) :);
 
-	return w;
+	return (unsigned long)w;
 
 legacy:
 # endif