Message ID | 20250403094425.876981-4-m.wilczynski@samsung.com (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show |
Series | [v7,1/3] dt-bindings: clock: thead: Add TH1520 VO clock controller | expand |
Context | Check | Description |
---|---|---|
bjorn/pre-ci_am | success | Success |
bjorn/build-rv32-defconfig | success | build-rv32-defconfig |
bjorn/build-rv64-clang-allmodconfig | success | build-rv64-clang-allmodconfig |
bjorn/build-rv64-gcc-allmodconfig | success | build-rv64-gcc-allmodconfig |
bjorn/build-rv64-nommu-k210-defconfig | success | build-rv64-nommu-k210-defconfig |
bjorn/build-rv64-nommu-k210-virt | success | build-rv64-nommu-k210-virt |
bjorn/checkpatch | success | checkpatch |
bjorn/dtb-warn-rv64 | success | dtb-warn-rv64 |
bjorn/header-inline | success | header-inline |
bjorn/kdoc | success | kdoc |
bjorn/module-param | success | module-param |
bjorn/verify-fixes | success | verify-fixes |
bjorn/verify-signedoff | success | verify-signedoff |
On Thu, Apr 03, 2025 at 11:44:25AM +0200, Michal Wilczynski wrote: > VO clocks reside in a different address space from the AP clocks on the > T-HEAD SoC. Add the device tree node of a clock-controller to handle > VO address space as well. > > Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> > --- > arch/riscv/boot/dts/thead/th1520.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index 527336417765..d4cba0713cab 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -489,6 +489,13 @@ clk: clock-controller@ffef010000 { > #clock-cells = <1>; > }; > > + clk_vo: clock-controller@ffef528050 { > + compatible = "thead,th1520-clk-vo"; > + reg = <0xff 0xef528050 0x0 0xfb0>; Thanks for your patch. It is great to have more of the clocks supported upstream. The TH1520 System User Manual shows 0xFF_EF52_8000 for VO_SUBSYS on page 205. Is there a reason you decided to use 0xFF_EF52_8050 as the base? I see on page 213 that the first register for VO_SUBSYS starts with VOSYS_CLK_GATE at offset 0x50. I figure you did this to have the CCU_GATE macros use offset of 0x0 instead 0x50. I kind of think the reg property using the actual base address (0xFF_EF52_8000) makes more sense as that's a closer match to the tables in the manual. But I don't have a strong preference if you think think using 0xef528050 makes the CCU_GATE macros easier to read. -Drew
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 527336417765..d4cba0713cab 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -489,6 +489,13 @@ clk: clock-controller@ffef010000 { #clock-cells = <1>; }; + clk_vo: clock-controller@ffef528050 { + compatible = "thead,th1520-clk-vo"; + reg = <0xff 0xef528050 0x0 0xfb0>; + clocks = <&clk CLK_VIDEO_PLL>; + #clock-cells = <1>; + }; + dmac0: dma-controller@ffefc00000 { compatible = "snps,axi-dma-1.01a"; reg = <0xff 0xefc00000 0x0 0x1000>;
VO clocks reside in a different address space from the AP clocks on the T-HEAD SoC. Add the device tree node of a clock-controller to handle VO address space as well. Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> --- arch/riscv/boot/dts/thead/th1520.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)