diff mbox series

pinctrl: starfive: Make the irqchip immutable

Message ID 5eb66be34356afd5eb0ea9027329e0939d03d3a0.1652884852.git.geert+renesas@glider.be (mailing list archive)
State New
Headers show
Series pinctrl: starfive: Make the irqchip immutable | expand

Commit Message

Geert Uytterhoeven May 18, 2022, 2:41 p.m. UTC
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.  Following this change the following warning is
now observed for the starfive driver:

    gpio gpiochip0: (11910000.pinctrl): not an immutable chip, please consider fixing it!

Fix this by making the irqchip in the starfive driver immutable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Against linux-next.
Boot-tested on BeagleV Starlight Beta.
---
 drivers/pinctrl/pinctrl-starfive.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

Comments

Linus Walleij May 19, 2022, 1:16 p.m. UTC | #1
On Wed, May 18, 2022 at 4:41 PM Geert Uytterhoeven
<geert+renesas@glider.be> wrote:

> Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
> immutable") added a warning to indicate if the gpiolib is altering the
> internals of irqchips.  Following this change the following warning is
> now observed for the starfive driver:
>
>     gpio gpiochip0: (11910000.pinctrl): not an immutable chip, please consider fixing it!
>
> Fix this by making the irqchip in the starfive driver immutable.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> Against linux-next.
> Boot-tested on BeagleV Starlight Beta.

Patch applied!

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/pinctrl/pinctrl-starfive.c b/drivers/pinctrl/pinctrl-starfive.c
index f2b7d002ccb17900..f82a72f8016f59cc 100644
--- a/drivers/pinctrl/pinctrl-starfive.c
+++ b/drivers/pinctrl/pinctrl-starfive.c
@@ -1078,6 +1078,8 @@  static void starfive_irq_mask(struct irq_data *d)
 	value = readl_relaxed(ie) & ~mask;
 	writel_relaxed(value, ie);
 	raw_spin_unlock_irqrestore(&sfp->lock, flags);
+
+	gpiochip_disable_irq(&sfp->gc, d->hwirq);
 }
 
 static void starfive_irq_mask_ack(struct irq_data *d)
@@ -1106,6 +1108,8 @@  static void starfive_irq_unmask(struct irq_data *d)
 	unsigned long flags;
 	u32 value;
 
+	gpiochip_enable_irq(&sfp->gc, d->hwirq);
+
 	raw_spin_lock_irqsave(&sfp->lock, flags);
 	value = readl_relaxed(ie) | mask;
 	writel_relaxed(value, ie);
@@ -1167,14 +1171,15 @@  static int starfive_irq_set_type(struct irq_data *d, unsigned int trigger)
 	return 0;
 }
 
-static struct irq_chip starfive_irq_chip = {
+static const struct irq_chip starfive_irq_chip = {
 	.name = "StarFive GPIO",
 	.irq_ack = starfive_irq_ack,
 	.irq_mask = starfive_irq_mask,
 	.irq_mask_ack = starfive_irq_mask_ack,
 	.irq_unmask = starfive_irq_unmask,
 	.irq_set_type = starfive_irq_set_type,
-	.flags = IRQCHIP_SET_TYPE_MASKED,
+	.flags = IRQCHIP_IMMUTABLE | IRQCHIP_SET_TYPE_MASKED,
+	GPIOCHIP_IRQ_RESOURCE_HELPERS,
 };
 
 static void starfive_gpio_irq_handler(struct irq_desc *desc)
@@ -1374,7 +1379,7 @@  static int starfive_probe(struct platform_device *pdev)
 	sfp->gc.base = -1;
 	sfp->gc.ngpio = NR_GPIOS;
 
-	sfp->gc.irq.chip = &starfive_irq_chip;
+	gpio_irq_chip_set_chip(&sfp->gc.irq, &starfive_irq_chip);
 	sfp->gc.irq.parent_handler = starfive_gpio_irq_handler;
 	sfp->gc.irq.num_parents = 1;
 	sfp->gc.irq.parents = devm_kcalloc(dev, sfp->gc.irq.num_parents,