| Message ID | CDDAB2D0-264E-42F3-8E31-BA210BEB8EC1@rivosinc.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Delegated to: | Palmer Dabbelt |
| Headers | show |
| Series | [V2] clocksource: riscv: Patch riscv_clock_next_event() jump before first use | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Single patches do not need cover letters |
| conchuod/tree_selection | success | Guessed tree name to be fixes |
| conchuod/fixes_present | success | Fixes tag present in non-next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 13 and now 13 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/alphanumeric_selects | success | Out of order selects before the patch: 57 and now 57 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 2 this patch: 2 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 22 lines checked |
| conchuod/source_inline | success | Was 0 now: 0 |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | Fixes tag looks correct |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Thu, Feb 2, 2023 at 1:19 AM Matt Evans <mev@rivosinc.com> wrote: > > A static key is used to select between SBI and Sstc timer usage in > riscv_clock_next_event(), but currently the direction is resolved > after cpuhp_setup_state() is called (which sets the next event). The > first event will therefore fall through the sbi_set_timer() path; this > breaks Sstc-only systems. So, apply the jump patching before first > use. > > Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available") > Signed-off-by: Matt Evans <mev@rivosinc.com> Looks good to me. Reviewed-by: Anup Patel <anup@brainfault.org> Regards, Anup > --- > > V1 -> V2: Commit msg tweak. > > drivers/clocksource/timer-riscv.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 969a552da8d2..a36d173fd6cd 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -177,6 +177,11 @@ static int __init riscv_timer_init_dt(struct device_node *n) > return error; > } > > + if (riscv_isa_extension_available(NULL, SSTC)) { > + pr_info("Timer interrupt in S-mode is available via sstc extension\n"); > + static_branch_enable(&riscv_sstc_available); > + } > + > error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, > "clockevents/riscv/timer:starting", > riscv_timer_starting_cpu, riscv_timer_dying_cpu); > @@ -184,11 +189,6 @@ static int __init riscv_timer_init_dt(struct device_node *n) > pr_err("cpu hp setup state failed for RISCV timer [%d]\n", > error); > > - if (riscv_isa_extension_available(NULL, SSTC)) { > - pr_info("Timer interrupt in S-mode is available via sstc extension\n"); > - static_branch_enable(&riscv_sstc_available); > - } > - > return error; > } > > -- > 2.30.2 > >
On Wed, 01 Feb 2023 11:49:42 PST (-0800), Matt Evans wrote: > A static key is used to select between SBI and Sstc timer usage in > riscv_clock_next_event(), but currently the direction is resolved > after cpuhp_setup_state() is called (which sets the next event). The > first event will therefore fall through the sbi_set_timer() path; this > breaks Sstc-only systems. So, apply the jump patching before first > use. > > Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available") > Signed-off-by: Matt Evans <mev@rivosinc.com> > --- > > V1 -> V2: Commit msg tweak. > > drivers/clocksource/timer-riscv.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index 969a552da8d2..a36d173fd6cd 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -177,6 +177,11 @@ static int __init riscv_timer_init_dt(struct device_node *n) > return error; > } > > + if (riscv_isa_extension_available(NULL, SSTC)) { > + pr_info("Timer interrupt in S-mode is available via sstc extension\n"); > + static_branch_enable(&riscv_sstc_available); > + } > + > error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, > "clockevents/riscv/timer:starting", > riscv_timer_starting_cpu, riscv_timer_dying_cpu); > @@ -184,11 +189,6 @@ static int __init riscv_timer_init_dt(struct device_node *n) > pr_err("cpu hp setup state failed for RISCV timer [%d]\n", > error); > > - if (riscv_isa_extension_available(NULL, SSTC)) { > - pr_info("Timer interrupt in S-mode is available via sstc extension\n"); > - static_branch_enable(&riscv_sstc_available); > - } > - > return error; > } > > -- > 2.30.2 Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Looks like I've taken stuff here before, but I'm also happy to have the clocksource folks pick this up so Acked-by: Palmer Dabbelt <palmer@rivosinc.com> I don't think this is a particularly critical fix, as IIUC there's still no Sstc-only hardware in the real world. Given how late we are I'd err towards putting this on for-next anyway, so I'll give the clocksource folks a bit more time to chime in. Otherwise I'll put it on for-next before the merge window (assuming we're got an rc8 coming). Thanks!
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 969a552da8d2..a36d173fd6cd 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -177,6 +177,11 @@ static int __init riscv_timer_init_dt(struct device_node *n) return error; } + if (riscv_isa_extension_available(NULL, SSTC)) { + pr_info("Timer interrupt in S-mode is available via sstc extension\n"); + static_branch_enable(&riscv_sstc_available); + } + error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, "clockevents/riscv/timer:starting", riscv_timer_starting_cpu, riscv_timer_dying_cpu); @@ -184,11 +189,6 @@ static int __init riscv_timer_init_dt(struct device_node *n) pr_err("cpu hp setup state failed for RISCV timer [%d]\n", error); - if (riscv_isa_extension_available(NULL, SSTC)) { - pr_info("Timer interrupt in S-mode is available via sstc extension\n"); - static_branch_enable(&riscv_sstc_available); - } - return error; }
A static key is used to select between SBI and Sstc timer usage in riscv_clock_next_event(), but currently the direction is resolved after cpuhp_setup_state() is called (which sets the next event). The first event will therefore fall through the sbi_set_timer() path; this breaks Sstc-only systems. So, apply the jump patching before first use. Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available") Signed-off-by: Matt Evans <mev@rivosinc.com> --- V1 -> V2: Commit msg tweak. drivers/clocksource/timer-riscv.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)