mbox series

[GIT,PULL] RISC-V additional updates for v5.4-rc1

Message ID alpine.DEB.2.21.9999.1909271123370.17782@viisi.sifive.com (mailing list archive)
State New, archived
Headers show
Series [GIT,PULL] RISC-V additional updates for v5.4-rc1 | expand

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc1-b

Message

Paul Walmsley Sept. 27, 2019, 6:25 p.m. UTC
Linus,

The following changes since commit b41dae061bbd722b9d7fa828f35d22035b218e18:

  Merge tag 'xfs-5.4-merge-7' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux (2019-09-18 18:32:43 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc1-b

for you to fetch changes up to c82dd6d078a2bb29d41eda032bb96d05699a524d:

  riscv: Avoid interrupts being erroneously enabled in handle_exception() (2019-09-20 08:42:34 -0700)

----------------------------------------------------------------
RISC-V additional updates for v5.4-rc1

Some additional RISC-V updates for v5.4-rc1.  This includes one
significant fix:

- Prevent interrupts from being unconditionally re-enabled during
  exception handling if they were disabled in the context in which the
  exception occurred

Also a few other fixes:

- Fix a build error when sparse memory support is manually enabled

- Prevent CPUs beyond CONFIG_NR_CPUS from being enabled in early boot

And a few minor improvements:

- DT improvements: in the FU540 SoC DT files, improve U-Boot
  compatibility by adding an "ethernet0" alias, drop an unnecessary
  property from the DT files, and add support for the PWM device

- KVM preparation: add a KVM-related macro for future RISC-V KVM
  support, and export some symbols required to build KVM support as
  modules

- defconfig additions: build more drivers by default for QEMU
  configurations

----------------------------------------------------------------
Anup Patel (2):
      RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig
      KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface

Atish Patra (1):
      RISC-V: Export kernel symbols for kvm

Bin Meng (2):
      riscv: dts: sifive: Add ethernet0 to the aliases node
      riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes

Greentime Hu (1):
      RISC-V: Fix building error when CONFIG_SPARSEMEM_MANUAL=y

Vincent Chen (1):
      riscv: Avoid interrupts being erroneously enabled in handle_exception()

Xiang Wang (1):
      arch/riscv: disable excess harts before picking main boot hart

Yash Shah (1):
      riscv: dts: Add DT support for SiFive FU540 PWM driver

 arch/riscv/boot/dts/sifive/fu540-c000.dtsi         | 22 +++++++++++++++++---
 .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts |  8 ++++++++
 arch/riscv/configs/defconfig                       | 11 ++++++++++
 arch/riscv/configs/rv32_defconfig                  | 11 ++++++++++
 arch/riscv/include/asm/pgtable.h                   | 24 +++++++++++-----------
 arch/riscv/kernel/entry.S                          |  6 +++++-
 arch/riscv/kernel/head.S                           |  8 +++++---
 arch/riscv/kernel/smp.c                            |  1 +
 arch/riscv/kernel/time.c                           |  1 +
 include/uapi/linux/kvm.h                           |  1 +
 10 files changed, 74 insertions(+), 19 deletions(-)

Comments

pr-tracker-bot@kernel.org Sept. 27, 2019, 8:15 p.m. UTC | #1
The pull request you sent on Fri, 27 Sep 2019 11:25:13 -0700 (PDT):

> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc1-b

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/568d850e3c6015acec8f854f5be97766497a676b

Thank you!
Christoph Hellwig Sept. 27, 2019, 10:21 p.m. UTC | #2
On Fri, Sep 27, 2019 at 11:25:13AM -0700, Paul Walmsley wrote:
> Atish Patra (1):
>       RISC-V: Export kernel symbols for kvm

None of these have any current users, they should go in with the kvm
series once the virtualization spec has been finalized.