| Message ID | mhng-099fa737-a1fc-466d-bf27-9ad62173bb45@palmer-ri-x1c9 (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | [GIT,PULL] RISC-V Patches for the 6.11 Merge Window, Part 1 | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
The pull request you sent on Sat, 20 Jul 2024 06:35:08 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.11-mw1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/f557af081de6b45a25e27d633b4d8d2dbc2f428e
Thank you!
diff --cc arch/riscv/kernel/patch.c index ab03732d06c4,5b3f6406e8c4..000000000000 --- a/arch/riscv/kernel/patch.c
The following changes since commit 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0: Linux 6.10-rc1 (2024-05-26 15:20:12 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.11-mw1 for you to fetch changes up to 93b63f68d00a0483b450b446e2ea5386a1b94213: riscv: lib: relax assembly constraints in hweight (2024-07-15 08:46:46 -0700) ---------------------------------------------------------------- RISC-V Patches for the 6.11 Merge Window, Part 1 * Support for various new ISA extensions: * The Zve32[xf] and Zve64[xfd] sub-extensios of the vector extension. * Zimop and Zcmop for may-be-operations. * The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension. * Zawrs, * riscv,cpu-intc is now dtschema. * A handful of performance improvements and cleanups to text patching. * Support for memory hot{,un}plug * The highest user-allocatable virtual address is now visible in hwprobe. ---------------------------------------------------------------- Sorry this is a bit late, but I got caught up in a handful of build issues from other trees that cropped up during the merge window. Looks like that's mostly settling down, as usual I've got the fixed stacked up locally until things get sorted out. Aside from that everything looks clean on my end. I have one merge conflict: some of the in-flight text patching optimizations/cleanups ended up conflicting with the instruction tearing bugs we found during the last release cycle. As a result the fences are now inside the patching functions, which while slow should at least be correct. Here's my resolution of the actual diff, we could delete the functions but with more incoming I figured it was best to avoid sticking extra diff in the merge: +++ b/arch/riscv/kernel/patch.c @@@ -200,12 -186,13 +202,7 @@@ NOKPROBE_SYMBOL(patch_insn_set) int patch_text_set_nosync(void *addr, u8 c, size_t len) { - u32 *tp = addr; -- int ret; -- - ret = patch_insn_set(tp, c, len); - ret = patch_insn_set(addr, c, len); - if (!ret) - flush_icache_range((uintptr_t)addr, (uintptr_t)addr + len); -- -- return ret; ++ return patch_insn_set(addr, c, len); } NOKPROBE_SYMBOL(patch_text_set_nosync); @@@ -232,12 -222,13 +232,7 @@@ NOKPROBE_SYMBOL(patch_insn_write) int patch_text_nosync(void *addr, const void *insns, size_t len) { - u32 *tp = addr; -- int ret; -- - ret = patch_insn_write(tp, insns, len); - ret = patch_insn_write(addr, insns, len); - if (!ret) - flush_icache_range((uintptr_t)addr, (uintptr_t)addr + len); -- -- return ret; ++ return patch_insn_write(addr, insns, len); } NOKPROBE_SYMBOL(patch_text_nosync); ---------------------------------------------------------------- Alexandre Ghiti (2): riscv: Implement pte_accessible() riscv: Improve sbi_ecall() code generation by reordering arguments Andrew Jones (5): riscv: Provide a definition for 'pause' dt-bindings: riscv: Add Zawrs ISA extension description riscv: hwprobe: export Zawrs ISA extension KVM: riscv: Support guest wrs.nto KVM: riscv: selftests: Add Zawrs extension to get-reg-list test Andy Chiu (8): riscv: vector: add a comment when calling riscv_setup_vsize() riscv: smp: fail booting up smp if inconsistent vlen is detected riscv: cpufeature: call match_isa_ext() for single-letter extensions dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection riscv: hwprobe: add zve Vector subextensions into hwprobe interface riscv: vector: adjust minimum Vector requirement to ZVE32X selftest: run vector prctl test for ZVE32X Björn Töpel (11): riscv: mm: Properly forward vmemmap_populate() altmap parameter riscv: mm: Pre-allocate vmemmap/direct map/kasan PGD entries riscv: mm: Change attribute from __init to __meminit for page functions riscv: mm: Refactor create_linear_mapping_range() for memory hot add riscv: mm: Add pfn_to_kaddr() implementation riscv: mm: Add memory hotplugging support riscv: mm: Take memory hotplug read-lock during kernel page table dump riscv: Enable memory hotplugging for RISC-V virtio-mem: Enable virtio-mem for RISC-V riscv: mm: Add support for ZONE_DEVICE riscv: Enable DAX VMEMMAP optimization Christoph Müllner (1): riscv: Add Zawrs support for spinlocks Clément Léger (17): dt-bindings: riscv: add Zimop ISA extension description riscv: add ISA extension parsing for Zimop riscv: hwprobe: export Zimop ISA extension RISC-V: KVM: Allow Zimop extension for Guest/VM KVM: riscv: selftests: Add Zimop extension to get-reg-list test dt-bindings: riscv: add Zca, Zcf, Zcd and Zcb ISA extension description riscv: add ISA extensions validation callback riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test dt-bindings: riscv: add Zcmop ISA extension description riscv: add ISA extension parsing for Zcmop riscv: hwprobe: export Zcmop ISA extension RISC-V: KVM: Allow Zcmop extension for Guest/VM KVM: riscv: selftests: Add Zcmop extension to get-reg-list test riscv: hwprobe: export highest virtual userspace address Haibo Xu (1): riscv: dmi: Add SMBIOS/DMI support Kanak Shilledar (2): dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema dt-bindings: riscv: cpus: add ref to interrupt-controller Palmer Dabbelt (6): Merge patch series "Support Zve32[xf] and Zve64[xfd] Vector subextensions" Merge patch series "dt-bindings: interrupt-controller: riscv,cpu-intc" Merge patch series "riscv: Various text patching improvements" Merge patch series "Add support for a few Zc* extensions, Zcmop and Zimop" Merge patch series "riscv: Memory Hot(Un)Plug support" Merge patch series "riscv: Apply Zawrs when available" Qingfang Deng (1): riscv: lib: relax assembly constraints in hweight Samuel Holland (8): riscv: jump_label: Batch icache maintenance riscv: jump_label: Simplify assembly syntax riscv: kprobes: Use patch_text_nosync() for insn slots riscv: Simplify text patching loops riscv: Pass patch_text() the length in bytes riscv: Use offset_in_page() in text patching functions riscv: Remove extra variable in patch_text_nosync() riscv: Add tracepoints for SBI calls and returns Xiao Wang (1): riscv: Optimize crc32 with Zbc extension yang.zhang (1): riscv: set trap vector earlier Documentation/arch/riscv/hwprobe.rst | 50 +++ .../interrupt-controller/riscv,cpu-intc.txt | 52 --- .../interrupt-controller/riscv,cpu-intc.yaml | 73 +++++ Documentation/devicetree/bindings/riscv/cpus.yaml | 21 +- .../devicetree/bindings/riscv/extensions.yaml | 132 ++++++++ arch/riscv/Kconfig | 59 +++- arch/riscv/Makefile | 3 - arch/riscv/include/asm/arch_hweight.h | 8 +- arch/riscv/include/asm/barrier.h | 45 ++- arch/riscv/include/asm/cmpxchg.h | 58 ++++ arch/riscv/include/asm/cpufeature.h | 1 + arch/riscv/include/asm/dmi.h | 24 ++ arch/riscv/include/asm/hwcap.h | 12 + arch/riscv/include/asm/hwprobe.h | 2 +- arch/riscv/include/asm/insn-def.h | 4 + arch/riscv/include/asm/jump_label.h | 4 +- arch/riscv/include/asm/kasan.h | 4 +- arch/riscv/include/asm/kvm_host.h | 1 + arch/riscv/include/asm/mmu.h | 4 +- arch/riscv/include/asm/page.h | 5 + arch/riscv/include/asm/patch.h | 2 +- arch/riscv/include/asm/pgtable-64.h | 20 ++ arch/riscv/include/asm/pgtable-bits.h | 1 + arch/riscv/include/asm/pgtable.h | 32 +- arch/riscv/include/asm/processor.h | 6 + arch/riscv/include/asm/sbi.h | 10 +- arch/riscv/include/asm/trace.h | 54 ++++ arch/riscv/include/asm/vdso/processor.h | 8 +- arch/riscv/include/asm/vector.h | 10 +- arch/riscv/include/uapi/asm/hwprobe.h | 13 + arch/riscv/include/uapi/asm/kvm.h | 7 + arch/riscv/kernel/cpufeature.c | 328 +++++++++++++------ arch/riscv/kernel/head.S | 22 +- arch/riscv/kernel/jump_label.c | 16 +- arch/riscv/kernel/patch.c | 69 ++-- arch/riscv/kernel/probes/kprobes.c | 19 +- arch/riscv/kernel/sbi.c | 17 +- arch/riscv/kernel/smpboot.c | 14 +- arch/riscv/kernel/sys_hwprobe.c | 22 +- arch/riscv/kernel/vector.c | 5 +- arch/riscv/kvm/vcpu.c | 1 + arch/riscv/kvm/vcpu_insn.c | 15 + arch/riscv/kvm/vcpu_onereg.c | 14 + arch/riscv/lib/Makefile | 1 + arch/riscv/lib/crc32.c | 294 +++++++++++++++++ arch/riscv/lib/uaccess.S | 2 +- arch/riscv/mm/init.c | 347 ++++++++++++++++++--- arch/riscv/mm/ptdump.c | 3 + arch/riscv/net/bpf_jit_comp64.c | 7 +- drivers/firmware/efi/riscv-runtime.c | 13 + drivers/virtio/Kconfig | 2 +- include/linux/crc32.h | 3 + tools/testing/selftests/kvm/riscv/get-reg-list.c | 28 ++ .../testing/selftests/riscv/vector/vstate_prctl.c | 6 +- 54 files changed, 1644 insertions(+), 329 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.yaml create mode 100644 arch/riscv/include/asm/dmi.h create mode 100644 arch/riscv/include/asm/trace.h create mode 100644 arch/riscv/lib/crc32.c