| Message ID | mhng-e58ec1f9-86f2-451e-ac9f-9add83693752@palmerdabbelt-glaptop1 (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [GIT,PULL] RISC-V Patches for the 5.7 Merge Window, Part 1 | expand |
On Wed, Apr 8, 2020 at 9:50 AM Palmer Dabbelt <palmer@dabbelt.com> wrote: > > This builds and boots for me. There is one merge conflict, it's just a Kconfig > merge issue. I can publish a resolved branch if you'd like. It's not the _resolution_ that's the problem. The problem is that your tree is garbage. Your commit c48c4a4c7ead ("riscv: Add Kendryte K210 SoC support") is wrong. It doesn't do what it says it does. It _also_ adds that (broken) Kconfig entry for the virtual SoC (aka qemu) that isn't mentioned at all in the commit message. It looks like you mixed up commits when you did some development. Possibly because of bad resolutions when rebasing or whatever. I don't know what happened, but your tree is a mess. There's also a duplicate commit 9f40b6e77d2f that is a copy of commit 2191b4f298fa ("RISC-V: Move all address space definition macros to one place") that you sent earlier. I fixed things up and pulled this, but you're doing something wrong. Linus
The pull request you sent on Wed, 08 Apr 2020 09:50:05 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/eab40026605f4717a9749ffcaec8119d58494999
Thank you!
The following changes since commit 98d54f81e36ba3bf92172791eba5ca5bd813989b: Linux 5.6-rc4 (2020-03-01 16:38:46 -0600) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.7 for you to fetch changes up to 37809df4b1c88927fe944eb766e0553811c51f64: riscv: create a loader.bin boot image for Kendryte SoC (2020-04-03 10:50:17 -0700) ---------------------------------------------------------------- RISC-V Patches for the 5.7 Merge Window, Part 1 This tag contains the patches I'd like to target for 5.7. It has a handful of new features: * Partial support for the Kendryte K210. There are still a few outstanding issues that I have patches for, but I don't actually have a board to test them so they're not included yet. * SBI v0.2 support. * Fixes to support for building with LLVM-based toolchains. The resulting images are known not to boot yet. This builds and boots for me. There is one merge conflict, it's just a Kconfig merge issue. I can publish a resolved branch if you'd like. I don't anticipate a part two, but I'll probably have something early in the RCs to finish up the K210 support. ---------------------------------------------------------------- Alexandre Ghiti (1): riscv: Use p*d_leaf macros to define p*d_huge Atish Patra (12): RISC-V: Move all address space definition macros to one place RISC-V: Mark existing SBI as 0.1 SBI. RISC-V: Add basic support for SBI v0.2 RISC-V: Add SBI v0.2 extension definitions RISC-V: Introduce a new config for SBI v0.1 RISC-V: Implement new SBI v0.2 extensions RISC-V: Move relocate and few other functions out of __init RISC-V: Add cpu_ops and modify default booting method RISC-V: Export SBI error to linux error mapping function RISC-V: Add SBI HSM extension definitions RISC-V: Add supported for ordered booting method using HSM RISC-V: Support cpu hotplug Christoph Hellwig (2): riscv: Add Kendryte K210 SoC support riscv: create a loader.bin boot image for Kendryte SoC Damien Le Moal (5): riscv: Unaligned load/store handling for M_MODE riscv: Add SOC early init support riscv: Select required drivers for Kendryte SOC riscv: Add Kendryte K210 device tree riscv: Kendryte K210 default config Deepa Dinamani (1): riscv: Delete CONFIG_SYSFS_SYSCALL from defconfigs Guo Ren (1): riscv: Use flush_icache_mm for flush_icache_user_range Palmer Dabbelt (4): RISC-V: Stop putting .sbss in .sdata RISC-V: Stop relying on GCC's register allocator's hueristics RISC-V: Inline the assembly register save/restore macros RISC-V: Stop using LOCAL for the uaccess fixups Zong Li (12): riscv: force hart_lottery to put in .sdata section riscv: add ARCH_HAS_SET_MEMORY support riscv: add ARCH_HAS_SET_DIRECT_MAP support riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support riscv: move exception table immediately after RO_DATA riscv: add alignment for text, rodata and data sections riscv: add STRICT_KERNEL_RWX support riscv: add macro to get instruction length riscv: introduce interfaces to patch kernel code riscv: patch code by fixmap mapping riscv: Add support to dump the kernel page tables riscv: Use macro definition instead of magic number arch/riscv/Kconfig | 26 +- arch/riscv/Kconfig.socs | 34 ++ arch/riscv/Makefile | 6 +- arch/riscv/boot/Makefile | 3 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/kendryte/Makefile | 2 + arch/riscv/boot/dts/kendryte/k210.dts | 23 ++ arch/riscv/boot/dts/kendryte/k210.dtsi | 123 +++++++ arch/riscv/configs/defconfig | 1 + arch/riscv/configs/nommu_k210_defconfig | 68 ++++ arch/riscv/configs/rv32_defconfig | 1 + arch/riscv/include/asm/bug.h | 8 + arch/riscv/include/asm/cacheflush.h | 2 +- arch/riscv/include/asm/cpu_ops.h | 46 +++ arch/riscv/include/asm/current.h | 5 +- arch/riscv/include/asm/fixmap.h | 2 + arch/riscv/include/asm/kasan.h | 2 +- arch/riscv/include/asm/patch.h | 12 + arch/riscv/include/asm/pgtable.h | 80 +++-- arch/riscv/include/asm/ptdump.h | 11 + arch/riscv/include/asm/sbi.h | 195 +++++++---- arch/riscv/include/asm/set_memory.h | 48 +++ arch/riscv/include/asm/smp.h | 24 ++ arch/riscv/include/asm/soc.h | 23 ++ arch/riscv/kernel/Makefile | 13 +- arch/riscv/kernel/cpu-hotplug.c | 87 +++++ arch/riscv/kernel/cpu_ops.c | 46 +++ arch/riscv/kernel/cpu_ops_sbi.c | 115 +++++++ arch/riscv/kernel/cpu_ops_spinwait.c | 43 +++ arch/riscv/kernel/entry.S | 143 ++++---- arch/riscv/kernel/ftrace.c | 13 +- arch/riscv/kernel/head.S | 180 ++++++---- arch/riscv/kernel/patch.c | 120 +++++++ arch/riscv/kernel/process.c | 5 +- arch/riscv/kernel/sbi.c | 575 +++++++++++++++++++++++++++++++- arch/riscv/kernel/setup.c | 32 +- arch/riscv/kernel/smpboot.c | 53 +-- arch/riscv/kernel/soc.c | 28 ++ arch/riscv/kernel/stacktrace.c | 7 +- arch/riscv/kernel/traps.c | 32 +- arch/riscv/kernel/traps_misaligned.c | 370 ++++++++++++++++++++ arch/riscv/kernel/vmlinux.lds.S | 23 +- arch/riscv/lib/uaccess.S | 6 +- arch/riscv/mm/Makefile | 3 +- arch/riscv/mm/hugetlbpage.c | 6 +- arch/riscv/mm/init.c | 44 +++ arch/riscv/mm/pageattr.c | 187 +++++++++++ arch/riscv/mm/ptdump.c | 317 ++++++++++++++++++ drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/kendryte/Kconfig | 14 + drivers/soc/kendryte/Makefile | 3 + drivers/soc/kendryte/k210-sysctl.c | 248 ++++++++++++++ include/dt-bindings/clock/k210-clk.h | 20 ++ 54 files changed, 3154 insertions(+), 327 deletions(-) create mode 100644 arch/riscv/boot/dts/kendryte/Makefile create mode 100644 arch/riscv/boot/dts/kendryte/k210.dts create mode 100644 arch/riscv/boot/dts/kendryte/k210.dtsi create mode 100644 arch/riscv/configs/nommu_k210_defconfig create mode 100644 arch/riscv/include/asm/cpu_ops.h create mode 100644 arch/riscv/include/asm/patch.h create mode 100644 arch/riscv/include/asm/ptdump.h create mode 100644 arch/riscv/include/asm/set_memory.h create mode 100644 arch/riscv/include/asm/soc.h create mode 100644 arch/riscv/kernel/cpu-hotplug.c create mode 100644 arch/riscv/kernel/cpu_ops.c create mode 100644 arch/riscv/kernel/cpu_ops_sbi.c create mode 100644 arch/riscv/kernel/cpu_ops_spinwait.c create mode 100644 arch/riscv/kernel/patch.c create mode 100644 arch/riscv/kernel/soc.c create mode 100644 arch/riscv/kernel/traps_misaligned.c create mode 100644 arch/riscv/mm/pageattr.c create mode 100644 arch/riscv/mm/ptdump.c create mode 100644 drivers/soc/kendryte/Kconfig create mode 100644 drivers/soc/kendryte/Makefile create mode 100644 drivers/soc/kendryte/k210-sysctl.c create mode 100644 include/dt-bindings/clock/k210-clk.h