| Message ID | 20190921170152.5033-4-krzk@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3,1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema | expand |
Hi Krzysztof, On 21.09.2019 19:01, Krzysztof Kozlowski wrote: > Multi Core Timer node has interrupts routed to two different parents - > GIC and combiner. This was modeled with a interrupt-map within a > subnode but can be expressed in an easier and more common way, directly > in the node itself. Maybe we should simply use 'interrupts-extended' based approach and simplify mct node even more (get rid of interrupt-parent, interrupts, size/address cells)? > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > > --- > > Not tested. > --- > arch/arm/boot/dts/exynos4210.dtsi | 16 ++++++---------- > 1 file changed, 6 insertions(+), 10 deletions(-) > > diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi > index 6d3f19562aab..38c49ab8c733 100644 > --- a/arch/arm/boot/dts/exynos4210.dtsi > +++ b/arch/arm/boot/dts/exynos4210.dtsi > @@ -109,23 +109,19 @@ > mct: timer@10050000 { > compatible = "samsung,exynos4210-mct"; > reg = <0x10050000 0x800>; > - interrupt-parent = <&mct_map>; > - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; > clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; > clock-names = "fin_pll", "mct"; > - > - mct_map: mct-map { > - #interrupt-cells = <1>; > - #address-cells = <0>; > - #size-cells = <0>; > - interrupt-map = > - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, > + #address-cells = <0>; > + #size-cells = <0>; > + #interrupt-cells = <1>; > + interrupt-parent = <&mct>; > + interrupts = <0>, <1>, <2>, <3>, <4>, <5>; > + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, > <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, > <2 &combiner 12 6>, > <3 &combiner 12 7>, > <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, > <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; > - }; > }; > > watchdog: watchdog@10060000 { Best regards
On Mon, Sep 23, 2019 at 08:56:46AM +0200, Marek Szyprowski wrote: > Hi Krzysztof, > > On 21.09.2019 19:01, Krzysztof Kozlowski wrote: > > Multi Core Timer node has interrupts routed to two different parents - > > GIC and combiner. This was modeled with a interrupt-map within a > > subnode but can be expressed in an easier and more common way, directly > > in the node itself. > > Maybe we should simply use 'interrupts-extended' based approach and > simplify mct node even more (get rid of interrupt-parent, interrupts, > size/address cells)? Indeed, that looks like the tool for this job. Thanks for hint, I'll try it. Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6d3f19562aab..38c49ab8c733 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -109,23 +109,19 @@ mct: timer@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; - interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = - <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <&mct>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>; + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, <2 &combiner 12 6>, <3 &combiner 12 7>, <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; - }; }; watchdog: watchdog@10060000 {
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- Not tested. --- arch/arm/boot/dts/exynos4210.dtsi | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-)