@@ -51,7 +51,7 @@ config SPARC
config SPARC32
def_bool !64BIT
select ARCH_32BIT_OFF_T
- select ARCH_HAS_SYNC_DMA_FOR_CPU
+ select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select CLZ_TAB
select DMA_DIRECT_REMAP
select GENERIC_ATOMIC64
@@ -306,7 +306,7 @@ arch_initcall(sparc_register_ioport);
* On LEON systems without cache snooping, the entire D-CACHE must be flushed to
* make DMA to cacheable memory coherent.
*/
-void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
+void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
enum dma_data_direction dir)
{
if (dir != DMA_TO_DEVICE &&