| Message ID | 20211202095255.165797-1-herve.codina@bootlin.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | spear: Fix SPEAr3XX plgpio support | expand |
On 02-12-21, 10:52, Herve Codina wrote: > Hi, > > This patch series fixes the plgpio support on SPEAr3xx SOCs. > > The first four patches of this series fixes a ressources > sharing issue between the plgpio driver and the pinmux > driver. > Indeed, these two drivers can use the same IO address range > on some SPEAr3xx SOCs. > To solve the issue, a regmap (syscon managed) is used in both > drivers and the plgpio driver can reference the pinmux regmap > to use it. > > The second part of this series is related to IRQs. > The plgpio on SPEAr320s SOC uses an IRQ line in the reserve > range (from SPEAr320 point of view). > This issue is fixed enabling all the 'reserved' IRQs and > adding a dtsi file for the SPEAr320s with the correct interrupt > for the plgpio node. Are these changes backwards compatible ? I mean new kernel will work with old DTBs ? It may be quite important to not break that here.
On Thu, 2 Dec 2021 16:57:00 +0530 Viresh Kumar <viresh.kumar@linaro.org> wrote: > On 02-12-21, 10:52, Herve Codina wrote: > > Hi, > > > > This patch series fixes the plgpio support on SPEAr3xx SOCs. > > > > The first four patches of this series fixes a ressources > > sharing issue between the plgpio driver and the pinmux > > driver. > > Indeed, these two drivers can use the same IO address range > > on some SPEAr3xx SOCs. > > To solve the issue, a regmap (syscon managed) is used in both > > drivers and the plgpio driver can reference the pinmux regmap > > to use it. > > > > The second part of this series is related to IRQs. > > The plgpio on SPEAr320s SOC uses an IRQ line in the reserve > > range (from SPEAr320 point of view). > > This issue is fixed enabling all the 'reserved' IRQs and > > adding a dtsi file for the SPEAr320s with the correct interrupt > > for the plgpio node. > > Are these changes backwards compatible ? I mean new kernel will work > with old DTBs ? It may be quite important to not break that here. > Yes they are. - the regmap reference (phandle) is optional. - The IRQ for plgpio is used only on the new spear320s.dtsi. I have not seen any issues on my board (spear320s SOC) when I only add support for the 'reserved' IRQs (ie no spurious interrupts occur when I apply the patch related to shirq). I cannot test on SPEAr320 SOC as I haven't got any board with this SOC. Herve
On 02-12-21, 10:52, Herve Codina wrote: > Hi, > > This patch series fixes the plgpio support on SPEAr3xx SOCs. > > The first four patches of this series fixes a ressources > sharing issue between the plgpio driver and the pinmux > driver. > Indeed, these two drivers can use the same IO address range > on some SPEAr3xx SOCs. > To solve the issue, a regmap (syscon managed) is used in both > drivers and the plgpio driver can reference the pinmux regmap > to use it. > > The second part of this series is related to IRQs. > The plgpio on SPEAr320s SOC uses an IRQ line in the reserve > range (from SPEAr320 point of view). > This issue is fixed enabling all the 'reserved' IRQs and > adding a dtsi file for the SPEAr320s with the correct interrupt > for the plgpio node. > > Best regards, > Herve > > Herve Codina (6): > pinctrl: spear: spear: Convert to regmap > pinctrl: spear: plgpio: Convert to regmap > pinctrl: spear: plgpio: Introduce regmap phandle > ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320 > irq: spear-shirq: Add support for IRQ 0..6 > ARM: dts: spear3xx: Add spear320s dtsi Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
On Thu, Dec 2, 2021 at 10:53 AM Herve Codina <herve.codina@bootlin.com> wrote: > Herve Codina (6): > pinctrl: spear: spear: Convert to regmap > pinctrl: spear: plgpio: Convert to regmap > pinctrl: spear: plgpio: Introduce regmap phandle These three applied to the pinctrl tree. > ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320 Please apply this to the SoC tree. > irq: spear-shirq: Add support for IRQ 0..6 Please ask Marc Zyngier to apply this to the irqchip tree. > ARM: dts: spear3xx: Add spear320s dtsi Please apply this to the SoC tree. Yours, Linus Walleij