diff mbox series

[v2,02/13] arm: dts: calxeda: Provide UART clock

Message ID 20200227182210.89512-3-andre.przywara@arm.com (mailing list archive)
State Superseded
Headers show
Series arm: calxeda: update DTS, bindings and MAINTAINERS | expand

Commit Message

Andre Przywara Feb. 27, 2020, 6:21 p.m. UTC
The PL011 UART binding requires two clocks to be named in a node.
Add the second clock, which is the bus gate, that just gets enabled.
Since this is a fixed clock anyway, it doesn't make any difference.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/ecx-common.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Rob Herring (Arm) Feb. 27, 2020, 9:43 p.m. UTC | #1
On Thu, Feb 27, 2020 at 06:21:59PM +0000, Andre Przywara wrote:
> The PL011 UART binding requires two clocks to be named in a node.
> Add the second clock, which is the bus gate, that just gets enabled.
> Since this is a fixed clock anyway, it doesn't make any difference.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/boot/dts/ecx-common.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi
index 66ee1d34f72b..f819e3328a9e 100644
--- a/arch/arm/boot/dts/ecx-common.dtsi
+++ b/arch/arm/boot/dts/ecx-common.dtsi
@@ -114,8 +114,8 @@ 
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0xfff36000 0x1000>;
 			interrupts = <0 20 4>;
-			clocks = <&pclk>;
-			clock-names = "apb_pclk";
+			clocks = <&pclk>, <&pclk>;
+			clock-names = "uartclk", "apb_pclk";
 		};
 
 		smic@fff3a000 {