| Message ID | 20220502224127.2604333-11-michael@walle.cc (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | ARM: dts: lan966x: dtsi improvements and KSwitch D10 support | expand |
On 03.05.2022 01:41, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add the switch reset node which will later be used by the switch driver. > The switch reset also resets the GPIO controller and the SGPIO > controller, thus it also has to be connectected to these nodes. This way > the reset will only issued once for the first device requesting the > reset. > > Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > arch/arm/boot/dts/lan966x.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index 0442735910da..7020b31322d8 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -391,6 +391,11 @@ watchdog: watchdog@e0090000 { > status = "disabled"; > }; > > + cpu_ctrl: syscon@e00c0000 { > + compatible = "microchip,lan966x-cpu-syscon", "syscon"; > + reg = <0xe00c0000 0x350>; > + }; > + > can0: can@e081c000 { > compatible = "bosch,m_can"; > reg = <0xe081c000 0xfc>, <0x00100000 0x4000>; > @@ -406,10 +411,20 @@ can0: can@e081c000 { > status = "disabled"; > }; > > + reset: reset-controller@e200400c { > + compatible = "microchip,lan966x-switch-reset"; > + reg = <0xe200400c 0x4>; > + reg-names = "gcb"; > + #reset-cells = <1>; > + cpu-syscon = <&cpu_ctrl>; > + }; > + > gpio: pinctrl@e2004064 { > compatible = "microchip,lan966x-pinctrl"; > reg = <0xe2004064 0xb4>, > <0xe2010024 0x138>; > + resets = <&reset 0>; > + reset-names = "switch"; > gpio-controller; > #gpio-cells = <2>; > gpio-ranges = <&gpio 0 0 78>; > @@ -453,6 +468,8 @@ sgpio: gpio@e2004190 { > compatible = "microchip,sparx5-sgpio"; > reg = <0xe2004190 0x118>; > clocks = <&sys_clk>; > + resets = <&reset 0>; > + reset-names = "switch"; > #address-cells = <1>; > #size-cells = <0>; > status = "disabled"; > -- > 2.30.2 >
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 0442735910da..7020b31322d8 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -391,6 +391,11 @@ watchdog: watchdog@e0090000 { status = "disabled"; }; + cpu_ctrl: syscon@e00c0000 { + compatible = "microchip,lan966x-cpu-syscon", "syscon"; + reg = <0xe00c0000 0x350>; + }; + can0: can@e081c000 { compatible = "bosch,m_can"; reg = <0xe081c000 0xfc>, <0x00100000 0x4000>; @@ -406,10 +411,20 @@ can0: can@e081c000 { status = "disabled"; }; + reset: reset-controller@e200400c { + compatible = "microchip,lan966x-switch-reset"; + reg = <0xe200400c 0x4>; + reg-names = "gcb"; + #reset-cells = <1>; + cpu-syscon = <&cpu_ctrl>; + }; + gpio: pinctrl@e2004064 { compatible = "microchip,lan966x-pinctrl"; reg = <0xe2004064 0xb4>, <0xe2010024 0x138>; + resets = <&reset 0>; + reset-names = "switch"; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&gpio 0 0 78>; @@ -453,6 +468,8 @@ sgpio: gpio@e2004190 { compatible = "microchip,sparx5-sgpio"; reg = <0xe2004190 0x118>; clocks = <&sys_clk>; + resets = <&reset 0>; + reset-names = "switch"; #address-cells = <1>; #size-cells = <0>; status = "disabled";
Add the switch reset node which will later be used by the switch driver. The switch reset also resets the GPIO controller and the SGPIO controller, thus it also has to be connectected to these nodes. This way the reset will only issued once for the first device requesting the reset. Signed-off-by: Michael Walle <michael@walle.cc> --- arch/arm/boot/dts/lan966x.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)