diff mbox series

ARM: dts: intel-ixp42x-welltech-epbx100: add ethernet node

Message ID 20230125075838.2801020-1-linus.walleij@linaro.org (mailing list archive)
State Accepted
Commit 6042a5880aafb9591053c30cc5de0cfface30682
Headers show
Series ARM: dts: intel-ixp42x-welltech-epbx100: add ethernet node | expand

Commit Message

Linus Walleij Jan. 25, 2023, 7:58 a.m. UTC 
From: Corentin Labbe <clabbe@baylibre.com>

Add ethernet node for the first port of intel-ixp42x-welltech-epbx100.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Link: https://lore.kernel.org/r/20221005105510.3512132-1-clabbe@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ARM SoC folks: please apply this directly on some DTS branch,
we don't have any other IXP4xx DTS changes for v6.3.
---
 .../boot/dts/intel-ixp42x-welltech-epbx100.dts | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Comments

patchwork-bot+linux-soc@kernel.org Jan. 25, 2023, 4:20 p.m. UTC | #1 
Hello:

This patch was applied to soc/soc.git (for-next)
by Arnd Bergmann <arnd@arndb.de>:

On Wed, 25 Jan 2023 08:58:38 +0100 you wrote:
> From: Corentin Labbe <clabbe@baylibre.com>
> 
> Add ethernet node for the first port of intel-ixp42x-welltech-epbx100.
> 
> Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> Link: https://lore.kernel.org/r/20221005105510.3512132-1-clabbe@baylibre.com
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> 
> [...]

Here is the summary with links:
  - ARM: dts: intel-ixp42x-welltech-epbx100: add ethernet node
    https://git.kernel.org/soc/soc/c/6042a5880aaf

You are awesome, thank you!
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts b/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts
index f5846a50e4d4..b444003c10e1 100644
--- a/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts
+++ b/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts
@@ -76,5 +76,23 @@  partition@fff000 {
 				};
 			};
 		};
+
+		/* LAN port */
+		ethernet@c8009000 {
+			status = "ok";
+			queue-rx = <&qmgr 3>;
+			queue-txready = <&qmgr 20>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				phy5: ethernet-phy@5 {
+					reg = <5>;
+				};
+			};
+		};
 	};
 };