diff mbox series

bus: ixp4xx: fix IXP4XX_EXP_T1_MASK

Message ID 20230624122139.3229642-1-linus.walleij@linaro.org (mailing list archive)
State Accepted
Commit 6722e46513e0af8e2fff4698f7cb78bc50a9f13f
Headers show
Series bus: ixp4xx: fix IXP4XX_EXP_T1_MASK | expand

Commit Message

Linus Walleij June 24, 2023, 12:21 p.m. UTC 
From: Jonas Gorski <jonas.gorski@gmail.com>

The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping
IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is
also confirmed at least by the datasheet of IXP45X/46X [1].

Fix this by aligning it to IXP4XX_EXP_T1_SHIFT.

[1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf

Cc: stable@vger.kernel.org
Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Link: https://lore.kernel.org/r/20230624112958.27727-1-jonas.gorski@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
SoC maintainers: please apply this for fixes.
---
 drivers/bus/intel-ixp4xx-eb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

patchwork-bot+linux-soc@kernel.org July 5, 2023, 8:42 p.m. UTC | #1 
Hello:

This patch was applied to soc/soc.git (arm/fixes)
by Arnd Bergmann <arnd@arndb.de>:

On Sat, 24 Jun 2023 14:21:39 +0200 you wrote:
> From: Jonas Gorski <jonas.gorski@gmail.com>
> 
> The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping
> IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is
> also confirmed at least by the datasheet of IXP45X/46X [1].
> 
> Fix this by aligning it to IXP4XX_EXP_T1_SHIFT.
> 
> [...]

Here is the summary with links:
  - bus: ixp4xx: fix IXP4XX_EXP_T1_MASK
    https://git.kernel.org/soc/soc/c/6722e46513e0

You are awesome, thank you!
diff mbox series

Patch

diff --git a/drivers/bus/intel-ixp4xx-eb.c b/drivers/bus/intel-ixp4xx-eb.c
index f5ba6bee6fd8..320cf307db05 100644
--- a/drivers/bus/intel-ixp4xx-eb.c
+++ b/drivers/bus/intel-ixp4xx-eb.c
@@ -33,7 +33,7 @@ 
 #define IXP4XX_EXP_TIMING_STRIDE	0x04
 #define IXP4XX_EXP_CS_EN		BIT(31)
 #define IXP456_EXP_PAR_EN		BIT(30) /* Only on IXP45x and IXP46x */
-#define IXP4XX_EXP_T1_MASK		GENMASK(28, 27)
+#define IXP4XX_EXP_T1_MASK		GENMASK(29, 28)
 #define IXP4XX_EXP_T1_SHIFT		28
 #define IXP4XX_EXP_T2_MASK		GENMASK(27, 26)
 #define IXP4XX_EXP_T2_SHIFT		26