| Message ID | 20230719160048.2737423-2-james.hilliard1@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] ARM: dts: imx6qdl: Add Variscite VAR-SOM-MX6 SoM support | expand |
On 19/07/2023 18:00, James Hilliard wrote: > This patch adds support for the Variscite MX6 SoM Carrier Board. > > This Carrier-Board has the following : > - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display > - HDMI Connector > - USB Host + USB OTG Connector > - 10/100/1000 Mbps Ethernet > - miniPCI-Express slot > - SD Card connector > - Audio Headphone/Line In jack connectors > - S-ATA > - On-board DMIC > - RS485 Header > - CAN bus header > - SPI header > - Camera Interfaces header > - OnBoard RTC with Coin Backup battery socket > - RS232 Debug Header (IDC10) > - RS232 DTE > > Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard > > The dts file based on the ones provided by Variscite on their own > kernel, but adapted for mainline. > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > Signed-off-by: James Hilliard <james.hilliard1@gmail.com> > --- > arch/arm/boot/dts/Makefile | 1 + > .../arm/boot/dts/imx6q-var-mx6customboard.dts | 291 ++++++++++++++++++ > 2 files changed, 292 insertions(+) > create mode 100644 arch/arm/boot/dts/imx6q-var-mx6customboard.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 59829fc90315..9cfc3d3e91ea 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -665,6 +665,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ > imx6q-udoo.dtb \ > imx6q-utilite-pro.dtb \ > imx6q-var-dt6customboard.dtb \ > + imx6q-var-mx6customboard.dtb \ > imx6q-vicut1.dtb \ > imx6q-wandboard.dtb \ > imx6q-wandboard-revb1.dtb \ > diff --git a/arch/arm/boot/dts/imx6q-var-mx6customboard.dts b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts > new file mode 100644 > index 000000000000..47e39a6dc611 > --- /dev/null > +++ b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts > @@ -0,0 +1,291 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Support for Variscite MX6 Carrier-board > + * > + * Copyright 2016 Variscite, Ltd. All Rights Reserved > + * Copyright 2022 Bootlin > + */ > + > +/dts-v1/; > + > +#include "imx6qdl-var-som.dtsi" > +#include <dt-bindings/pwm/pwm.h> > + > +/ { > + model = "Variscite MX6 Custom Board"; Missing compatible. Missing bindings. > + > + reg_usb_otg_vbus: regulator-usb-otg-vbus { > + compatible = "regulator-fixed"; > + regulator-name = "usb_otg_vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > + > + reg_usb_h1_vbus: regulator-usb-h1-vbud { > + compatible = "regulator-fixed"; > + regulator-name = "usb_h1_vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > + > + reg_audio: regulator-audio { > + compatible = "regulator-fixed"; > + regulator-name = "tlv320aic3x-supply"; > + enable-active-high; > + }; > + > + panel0: lvds-panel0 { > + compatible = "panel-lvds"; > + backlight = <&backlight_lvds>; > + width-mm = <152>; > + height-mm = <91>; > + label = "etm070001adh6"; > + data-mapping = "jeida-18"; > + > + panel-timing { > + clock-frequency = <32000000>; > + hactive = <800>; > + vactive = <480>; > + hback-porch = <39>; > + hfront-porch = <39>; > + vback-porch = <29>; > + vfront-porch = <13>; > + hsync-len = <47>; > + vsync-len = <2>; > + }; Messed up indentation. > + > + port { > + panel_in_lvds0: endpoint { > + remote-endpoint = <&lvds0_out>; > + }; > + }; > + }; > + > + panel1: lvds-panel1 { > + compatible = "panel-lvds"; > + width-mm = <152>; > + height-mm = <91>; > + data-mapping = "jeida-18"; > + > + panel-timing { > + clock-frequency = <38251000>; > + hactive = <800>; Same problem. > + vactive = <600>; > + hback-porch = <112>; > + hfront-porch = <32>; > + vback-porch = <3>; > + vfront-porch = <17>; > + hsync-len = <80>; > + vsync-len = <4>; > + }; > + > + port { > + panel_in_lvds1: endpoint { > + remote-endpoint = <&lvds1_out>; > + }; > + }; > + }; > + > + backlight_lvds: backlight-lvds { > + compatible = "pwm-backlight"; > + pwms = <&pwm2 0 50000 0>; > + brightness-levels = <0 4 8 16 32 64 128 248>; > + default-brightness-level = <7>; > + status = "okay"; Drop status. Why do you need it? > + }; > +}; > + > +&i2c3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c3>; > + status = "okay"; > + > + touchscreen@24 { > + compatible = "cypress,tt21000"; > + reg = <0x24>; > + interrupt-parent = <&gpio3>; > + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; > + touchscreen-size-x = <880>; > + touchscreen-size-y = <1280>; > + }; > + > + touchscreen@38 { > + compatible = "edt,edt-ft5x06"; > + reg = <0x38>; > + interrupt-parent = <&gpio3>; > + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; > + touchscreen-size-x = <1800>; > + touchscreen-size-y = <1000>; > + }; > +}; > + > +&iomuxc { > + imx6qdl-var-som-mx6 { > + Drop stray blank line > + pinctrl_ipu1: ipu1grp { > + fsl,pins = < > + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 > + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 > + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 > + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 > + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 > + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 > + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 > + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 > + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 > + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 > + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 > + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 > + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 > + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 > + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 > + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 > + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 > + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 > + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 > + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 > + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 > + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 > + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 > + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 > + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 > + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 > + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 > + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 > + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 > + >; > + }; > + > + pinctrl_ipu1: ipu1grp { > + fsl,pins = < > + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 > + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 > + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 > + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 > + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 > + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 > + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 > + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 > + MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 > + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 > + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 > + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 > + >; > + }; > + > + pinctrl_usbotg_var: usbotggrp { > + fsl,pins = < > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059 > + >; > + }; > + > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins = < > + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 > + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins = < > + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 > + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 > + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 > + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 > + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 > + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 > + >; > + }; > + > + pinctrl_flexcan1: flexcan1grp { > + fsl,pins = < > + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 > + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 > + >; > + }; > + }; > +}; > + > +&mipi_csi { > + status = "okay"; > + ipu_id = <0>; > + csi_id = <1>; > + v_channel = <0>; > + lanes = <2>; > +}; > + > +&usbh1 { > + vbus-supply = <®_usb_h1_vbus>; > + status = "okay"; > +}; > + > +&ldb { > + status = "okay"; > + > + lvds-channel@0 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; Again, why do you need it? Is it disabled? > + primary; > + port@4 { > + reg = <4>; > + > + lvds0_out: endpoint { > + remote-endpoint = <&panel_in_lvds0>; > + }; > + }; > + }; > + > + lvds-channel@1 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + primary; > + port@4 { > + reg = <4>; > + > + lvds1_out: endpoint { > + remote-endpoint = <&panel_in_lvds1>; > + }; > + }; > + }; > +}; Best regards, Krzysztof
On Wed, Jul 19, 2023 at 11:18 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > > + > > +&ldb { > > + status = "okay"; > > + > > + lvds-channel@0 { > > + fsl,data-mapping = "spwg"; > > + fsl,data-width = <24>; > > + status = "okay"; > > Again, why do you need it? Is it disabled? I think so? https://github.com/torvalds/linux/blob/v6.5-rc2/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi#L87
On 19/07/2023 21:11, James Hilliard wrote: > On Wed, Jul 19, 2023 at 11:18 AM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >>> + >>> +&ldb { >>> + status = "okay"; >>> + >>> + lvds-channel@0 { >>> + fsl,data-mapping = "spwg"; >>> + fsl,data-width = <24>; >>> + status = "okay"; >> >> Again, why do you need it? Is it disabled? > > I think so? > https://github.com/torvalds/linux/blob/v6.5-rc2/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi#L87 Then it is okay. Usually nodes are extended via phandle/label. Best regards, Krzysztof
Hi James, On Wed, Jul 19, 2023 at 1:01 PM James Hilliard <james.hilliard1@gmail.com> wrote: > > This patch adds support for the Variscite MX6 SoM Carrier Board. > > This Carrier-Board has the following : > - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display > - HDMI Connector > - USB Host + USB OTG Connector > - 10/100/1000 Mbps Ethernet > - miniPCI-Express slot > - SD Card connector > - Audio Headphone/Line In jack connectors > - S-ATA > - On-board DMIC > - RS485 Header > - CAN bus header > - SPI header > - Camera Interfaces header > - OnBoard RTC with Coin Backup battery socket > - RS232 Debug Header (IDC10) > - RS232 DTE Good, but what exactly has been tested? > Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard > > The dts file based on the ones provided by Variscite on their own > kernel, but adapted for mainline. > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Is this patch from you or Gregory? If Gregory is the author, then his name should appear in the From: line. > +&iomuxc { > + imx6qdl-var-som-mx6 { This ' imx6qdl-var-som-mx6' should be dropped. > + > + pinctrl_ipu1: ipu1grp { > + fsl,pins = < > + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 > + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 > + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 > + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 > + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 No 0x80000000 please. Use the real pad ctl value instead. This applies globally. &mipi_csi { > + status = "okay"; > + ipu_id = <0>; > + csi_id = <1>; > + v_channel = <0>; > + lanes = <2>; These are all NXP vendor devicetree properties. They do not exist upstream. > + lvds-channel@0 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + primary; This property does not exist upstream. > + lvds-channel@1 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + primary; Ditto. > +&usbphy1 { > + tx-d-cal = <0x5>; In upstream it is called fsl,tx-d-cal. > +}; > + > +&usbphy2 { > + tx-d-cal = <0x5>; Ditto.
On Wed, Jul 19, 2023 at 1:32 PM Fabio Estevam <festevam@gmail.com> wrote: > > Hi James, > > On Wed, Jul 19, 2023 at 1:01 PM James Hilliard > <james.hilliard1@gmail.com> wrote: > > > > This patch adds support for the Variscite MX6 SoM Carrier Board. > > > > This Carrier-Board has the following : > > - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display > > - HDMI Connector > > - USB Host + USB OTG Connector > > - 10/100/1000 Mbps Ethernet > > - miniPCI-Express slot > > - SD Card connector > > - Audio Headphone/Line In jack connectors > > - S-ATA > > - On-board DMIC > > - RS485 Header > > - CAN bus header > > - SPI header > > - Camera Interfaces header > > - OnBoard RTC with Coin Backup battery socket > > - RS232 Debug Header (IDC10) > > - RS232 DTE > > Good, but what exactly has been tested? Well so far the basics such as the screen/networking and such seem to work. Tested with: https://www.variscite.com/product/evaluation-kits/var-som-mx6-kits/ Part number VAR-DVK-MX6_V2-PRO As well as another custom PCB with a very similar design using the SOM. > > > Product Page : https://www.variscite.com/product/single-board-computers/var-mx6customboard > > > > The dts file based on the ones provided by Variscite on their own > > kernel, but adapted for mainline. > > > > Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> > > Signed-off-by: James Hilliard <james.hilliard1@gmail.com> > > Is this patch from you or Gregory? If Gregory is the author, then his > name should appear in the From: line. It's from me, the original(seemingly abandoned) patch was from Gregory on the mailing list which I have been attempting to clean up. > > > +&iomuxc { > > + imx6qdl-var-som-mx6 { > > This ' imx6qdl-var-som-mx6' should be dropped. > > > + > > + pinctrl_ipu1: ipu1grp { > > + fsl,pins = < > > + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 > > + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 > > + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 > > + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 > > + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 > > No 0x80000000 please. Use the real pad ctl value instead. > This applies globally. > > &mipi_csi { > > + status = "okay"; > > + ipu_id = <0>; > > + csi_id = <1>; > > + v_channel = <0>; > > + lanes = <2>; > > These are all NXP vendor devicetree properties. They do not exist upstream. > > > + lvds-channel@0 { > > + fsl,data-mapping = "spwg"; > > + fsl,data-width = <24>; > > + status = "okay"; > > + primary; > > This property does not exist upstream. > > > + lvds-channel@1 { > > + fsl,data-mapping = "spwg"; > > + fsl,data-width = <24>; > > + status = "okay"; > > + primary; > > Ditto. > > > +&usbphy1 { > > + tx-d-cal = <0x5>; > > In upstream it is called fsl,tx-d-cal. > > > +}; > > + > > +&usbphy2 { > > + tx-d-cal = <0x5>; > > Ditto.
On Wed, Jul 19, 2023 at 1:32 PM Fabio Estevam <festevam@gmail.com> wrote: > > > + > > + pinctrl_ipu1: ipu1grp { > > + fsl,pins = < > > + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 > > + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 > > + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 > > + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 > > + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 > > No 0x80000000 please. Use the real pad ctl value instead. > This applies globally. How would I determine what the value of these should be? The vendor device trees are using 0x80000000 for these values from what I can tell.
On Wed, Jul 19, 2023 at 7:43 PM James Hilliard <james.hilliard1@gmail.com> wrote: > How would I determine what the value of these should be? > > The vendor device trees are using 0x80000000 for these values from > what I can tell. 0x80000000 means "do not touch the pinctrl, use the value from the bootloader". It's preferable not to rely on the value that comes from the bootloader and explicitly describe the value in the DT. For the MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 pin: look at its IOMUXC_SW_PAD_CTL register in the i.MX6Q Reference Manual. It is called IOMUXC_SW_PAD_CTL_PAD_DI0_PIN04 and its reset value is 0x1b0b0. So this entry would become: MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x1b0b0
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 59829fc90315..9cfc3d3e91ea 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -665,6 +665,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-udoo.dtb \ imx6q-utilite-pro.dtb \ imx6q-var-dt6customboard.dtb \ + imx6q-var-mx6customboard.dtb \ imx6q-vicut1.dtb \ imx6q-wandboard.dtb \ imx6q-wandboard-revb1.dtb \ diff --git a/arch/arm/boot/dts/imx6q-var-mx6customboard.dts b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts new file mode 100644 index 000000000000..47e39a6dc611 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-var-mx6customboard.dts @@ -0,0 +1,291 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Support for Variscite MX6 Carrier-board + * + * Copyright 2016 Variscite, Ltd. All Rights Reserved + * Copyright 2022 Bootlin + */ + +/dts-v1/; + +#include "imx6qdl-var-som.dtsi" +#include <dt-bindings/pwm/pwm.h> + +/ { + model = "Variscite MX6 Custom Board"; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_h1_vbus: regulator-usb-h1-vbud { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_audio: regulator-audio { + compatible = "regulator-fixed"; + regulator-name = "tlv320aic3x-supply"; + enable-active-high; + }; + + panel0: lvds-panel0 { + compatible = "panel-lvds"; + backlight = <&backlight_lvds>; + width-mm = <152>; + height-mm = <91>; + label = "etm070001adh6"; + data-mapping = "jeida-18"; + + panel-timing { + clock-frequency = <32000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <39>; + hfront-porch = <39>; + vback-porch = <29>; + vfront-porch = <13>; + hsync-len = <47>; + vsync-len = <2>; + }; + + port { + panel_in_lvds0: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; + + panel1: lvds-panel1 { + compatible = "panel-lvds"; + width-mm = <152>; + height-mm = <91>; + data-mapping = "jeida-18"; + + panel-timing { + clock-frequency = <38251000>; + hactive = <800>; + vactive = <600>; + hback-porch = <112>; + hfront-porch = <32>; + vback-porch = <3>; + vfront-porch = <17>; + hsync-len = <80>; + vsync-len = <4>; + }; + + port { + panel_in_lvds1: endpoint { + remote-endpoint = <&lvds1_out>; + }; + }; + }; + + backlight_lvds: backlight-lvds { + compatible = "pwm-backlight"; + pwms = <&pwm2 0 50000 0>; + brightness-levels = <0 4 8 16 32 64 128 248>; + default-brightness-level = <7>; + status = "okay"; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + touchscreen@24 { + compatible = "cypress,tt21000"; + reg = <0x24>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <880>; + touchscreen-size-y = <1280>; + }; + + touchscreen@38 { + compatible = "edt,edt-ft5x06"; + reg = <0x38>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <1800>; + touchscreen-size-y = <1000>; + }; +}; + +&iomuxc { + imx6qdl-var-som-mx6 { + + pinctrl_ipu1: ipu1grp { + fsl,pins = < + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 + >; + }; + + pinctrl_ipu1: ipu1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 + MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 + >; + }; + + pinctrl_usbotg_var: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 + >; + }; + }; +}; + +&mipi_csi { + status = "okay"; + ipu_id = <0>; + csi_id = <1>; + v_channel = <0>; + lanes = <2>; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + status = "okay"; +}; + +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + primary; + port@4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in_lvds0>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + primary; + port@4 { + reg = <4>; + + lvds1_out: endpoint { + remote-endpoint = <&panel_in_lvds1>; + }; + }; + }; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg_var>; + disable-over-current; + dr_mode = "host"; + status = "okay"; +}; + +&usbphy1 { + tx-d-cal = <0x5>; +}; + +&usbphy2 { + tx-d-cal = <0x5>; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + non-removable; + keep-power-in-suspend; + enable-sdio-wakeup; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +};