diff mbox series

[v7,11/16] watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro

Message ID 20231211162331.435900-12-peter.griffin@linaro.org (mailing list archive)
State Accepted
Commit d429928dde2d7e3e98cbea5f170d089d10a45c39
Headers show
Series Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board | expand

Commit Message

Peter Griffin Dec. 11, 2023, 4:23 p.m. UTC
Update the remaining QUIRK macros to use the BIT macro.

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
 drivers/watchdog/s3c2410_wdt.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Alim Akhtar Dec. 13, 2023, 4:34 p.m. UTC | #1
> -----Original Message-----
> From: Peter Griffin <peter.griffin@linaro.org>
> Sent: Monday, December 11, 2023 9:53 PM
> To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> mturquette@baylibre.com; conor+dt@kernel.org; sboyd@kernel.org;
> tomasz.figa@gmail.com; s.nawrocki@samsung.com; linus.walleij@linaro.org;
> wim@linux-watchdog.org; linux@roeck-us.net; catalin.marinas@arm.com;
> will@kernel.org; arnd@arndb.de; olof@lixom.net;
> gregkh@linuxfoundation.org; jirislaby@kernel.org;
> cw00.choi@samsung.com; alim.akhtar@samsung.com
> Cc: peter.griffin@linaro.org; tudor.ambarus@linaro.org;
> andre.draszik@linaro.org; semen.protsenko@linaro.org;
> saravanak@google.com; willmcvicker@google.com; soc@kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-
> gpio@vger.kernel.org; linux-watchdog@vger.kernel.org; kernel-
> team@android.com; linux-serial@vger.kernel.org
> Subject: [PATCH v7 11/16] watchdog: s3c2410_wdt: Update QUIRK macros to
> use BIT macro
> 
> Update the remaining QUIRK macros to use the BIT macro.
> 
Ah! I see you have change use BIT here, so you can squash this patch to
patch 10/16 or
Move BIT change from patch 10/16 to this patch. Either way is fine.

> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
>  drivers/watchdog/s3c2410_wdt.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/watchdog/s3c2410_wdt.c
> b/drivers/watchdog/s3c2410_wdt.c index 7ecb762a371d..b7a03668f743
> 100644
> --- a/drivers/watchdog/s3c2410_wdt.c
> +++ b/drivers/watchdog/s3c2410_wdt.c
> @@ -107,11 +107,11 @@
>   * DBGACK_MASK bit disables the watchdog outputs when the SoC is in
> debug mode.
>   * Debug mode is determined by the DBGACK CPU signal.
>   */
> -#define QUIRK_HAS_WTCLRINT_REG			(1 << 0)
> -#define QUIRK_HAS_PMU_MASK_RESET		(1 << 1)
> -#define QUIRK_HAS_PMU_RST_STAT			(1 << 2)
> -#define QUIRK_HAS_PMU_AUTO_DISABLE		(1 << 3)
> -#define QUIRK_HAS_PMU_CNT_EN			(1 << 4)
> +#define QUIRK_HAS_WTCLRINT_REG			BIT(0)
> +#define QUIRK_HAS_PMU_MASK_RESET		BIT(1)
> +#define QUIRK_HAS_PMU_RST_STAT			BIT(2)
> +#define QUIRK_HAS_PMU_AUTO_DISABLE		BIT(3)
> +#define QUIRK_HAS_PMU_CNT_EN			BIT(4)
>  #define QUIRK_HAS_DBGACK_BIT			BIT(5)
> 
>  /* These quirks require that we have a PMU register map */
> --
> 2.43.0.472.g3155946c3a-goog
Peter Griffin Dec. 13, 2023, 7:13 p.m. UTC | #2
Hi Alim,

Thanks for your reviews.

On Wed, 13 Dec 2023 at 16:34, Alim Akhtar <alim.akhtar@samsung.com> wrote:
>
>
>
> > -----Original Message-----
> > From: Peter Griffin <peter.griffin@linaro.org>
> > Sent: Monday, December 11, 2023 9:53 PM
> > To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> > mturquette@baylibre.com; conor+dt@kernel.org; sboyd@kernel.org;
> > tomasz.figa@gmail.com; s.nawrocki@samsung.com; linus.walleij@linaro.org;
> > wim@linux-watchdog.org; linux@roeck-us.net; catalin.marinas@arm.com;
> > will@kernel.org; arnd@arndb.de; olof@lixom.net;
> > gregkh@linuxfoundation.org; jirislaby@kernel.org;
> > cw00.choi@samsung.com; alim.akhtar@samsung.com
> > Cc: peter.griffin@linaro.org; tudor.ambarus@linaro.org;
> > andre.draszik@linaro.org; semen.protsenko@linaro.org;
> > saravanak@google.com; willmcvicker@google.com; soc@kernel.org;
> > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> > samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-
> > gpio@vger.kernel.org; linux-watchdog@vger.kernel.org; kernel-
> > team@android.com; linux-serial@vger.kernel.org
> > Subject: [PATCH v7 11/16] watchdog: s3c2410_wdt: Update QUIRK macros to
> > use BIT macro
> >
> > Update the remaining QUIRK macros to use the BIT macro.
> >
> Ah! I see you have change use BIT here, so you can squash this patch to
> patch 10/16 or
> Move BIT change from patch 10/16 to this patch. Either way is fine.

I actually kept them separate deliberately to avoid conflating adding
of the DBGACK quirk with cleanup of the driver to use BIT macro.

As such one patch adds the QUIRK and only updates the macros that were
touched by that patch (to avoid the --strict warnings), and the second
patch cleans up the rest of the macros to use BIT macro for
consistency.

regards,

Peter
Krzysztof Kozlowski Dec. 13, 2023, 7:16 p.m. UTC | #3
On Mon, 11 Dec 2023 16:23:26 +0000, Peter Griffin wrote:
> Update the remaining QUIRK macros to use the BIT macro.
> 
> 

Applied, thanks!

[11/16] watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro
        https://git.kernel.org/krzk/linux/c/d429928dde2d7e3e98cbea5f170d089d10a45c39

Best regards,
Krzysztof Kozlowski Dec. 13, 2023, 7:19 p.m. UTC | #4
On 13/12/2023 20:13, Peter Griffin wrote:
> Hi Alim,
> 
> Thanks for your reviews.
> 
> On Wed, 13 Dec 2023 at 16:34, Alim Akhtar <alim.akhtar@samsung.com> wrote:
>>
>>
>>
>>> -----Original Message-----
>>> From: Peter Griffin <peter.griffin@linaro.org>
>>> Sent: Monday, December 11, 2023 9:53 PM
>>> To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>>> mturquette@baylibre.com; conor+dt@kernel.org; sboyd@kernel.org;
>>> tomasz.figa@gmail.com; s.nawrocki@samsung.com; linus.walleij@linaro.org;
>>> wim@linux-watchdog.org; linux@roeck-us.net; catalin.marinas@arm.com;
>>> will@kernel.org; arnd@arndb.de; olof@lixom.net;
>>> gregkh@linuxfoundation.org; jirislaby@kernel.org;
>>> cw00.choi@samsung.com; alim.akhtar@samsung.com
>>> Cc: peter.griffin@linaro.org; tudor.ambarus@linaro.org;
>>> andre.draszik@linaro.org; semen.protsenko@linaro.org;
>>> saravanak@google.com; willmcvicker@google.com; soc@kernel.org;
>>> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
>>> samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-
>>> gpio@vger.kernel.org; linux-watchdog@vger.kernel.org; kernel-
>>> team@android.com; linux-serial@vger.kernel.org
>>> Subject: [PATCH v7 11/16] watchdog: s3c2410_wdt: Update QUIRK macros to
>>> use BIT macro
>>>
>>> Update the remaining QUIRK macros to use the BIT macro.
>>>
>> Ah! I see you have change use BIT here, so you can squash this patch to
>> patch 10/16 or
>> Move BIT change from patch 10/16 to this patch. Either way is fine.
> 
> I actually kept them separate deliberately to avoid conflating adding
> of the DBGACK quirk with cleanup of the driver to use BIT macro.
> 
> As such one patch adds the QUIRK and only updates the macros that were
> touched by that patch (to avoid the --strict warnings), and the second
> patch cleans up the rest of the macros to use BIT macro for
> consistency.

Yeah, the defines are from existing code, so not really related to GS101
patch. Keeping it as separate cleanup is fine.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 7ecb762a371d..b7a03668f743 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -107,11 +107,11 @@ 
  * DBGACK_MASK bit disables the watchdog outputs when the SoC is in debug mode.
  * Debug mode is determined by the DBGACK CPU signal.
  */
-#define QUIRK_HAS_WTCLRINT_REG			(1 << 0)
-#define QUIRK_HAS_PMU_MASK_RESET		(1 << 1)
-#define QUIRK_HAS_PMU_RST_STAT			(1 << 2)
-#define QUIRK_HAS_PMU_AUTO_DISABLE		(1 << 3)
-#define QUIRK_HAS_PMU_CNT_EN			(1 << 4)
+#define QUIRK_HAS_WTCLRINT_REG			BIT(0)
+#define QUIRK_HAS_PMU_MASK_RESET		BIT(1)
+#define QUIRK_HAS_PMU_RST_STAT			BIT(2)
+#define QUIRK_HAS_PMU_AUTO_DISABLE		BIT(3)
+#define QUIRK_HAS_PMU_CNT_EN			BIT(4)
 #define QUIRK_HAS_DBGACK_BIT			BIT(5)
 
 /* These quirks require that we have a PMU register map */