Message ID | 20250415072724.3565533-6-peter.chen@cixtech.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | arm64: Introduce CIX P1 (SKY1) SoC | expand |
On 15/04/2025 09:27, Peter Chen wrote: > From: Guomin Chen <Guomin.Chen@cixtech.com> > > Add a dt-binding for the Cixtech Mailbox Controller. > > Reviewed-by: Peter Chen <peter.chen@cixtech.com> > Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com> > Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com> You send patches to soc@ AFTER you get community review, not during. Look again at document I linked some time ago. New files are not sent to review to soc@. > --- > Changes for v3: > - Replace the direction attribute of the mailbox with the strings "rx" and "tx" > > .../bindings/mailbox/cix,sky1-mbox.yaml | 71 +++++++++++++++++++ > 1 file changed, 71 insertions(+) That's a completely new file? If you add new patches, mention in the changelog. And keep the changelog from the other patchset. What changed here? were my comments resolved or not? Best regards, Krzysztof
On 25-04-16 08:34:32, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL > > On 15/04/2025 09:27, Peter Chen wrote: > > From: Guomin Chen <Guomin.Chen@cixtech.com> > > > > Add a dt-binding for the Cixtech Mailbox Controller. > > > > Reviewed-by: Peter Chen <peter.chen@cixtech.com> > > Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com> > > Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com> > > You send patches to soc@ AFTER you get community review, not during. > Look again at document I linked some time ago. New files are not sent to > review to soc@. Okay, will delete @soc. > > > --- > > Changes for v3: > > - Replace the direction attribute of the mailbox with the strings "rx" and "tx" > > > > .../bindings/mailbox/cix,sky1-mbox.yaml | 71 +++++++++++++++++++ > > 1 file changed, 71 insertions(+) > > That's a completely new file? If you add new patches, mention in the > changelog. > > And keep the changelog from the other patchset. What changed here? were > my comments resolved or not? Yes, this mailbox patch-set has reviewed at [1], and added in this patch-set due to satisfy minimum new SoC patch-set requirement. I think Guomin has already addressed your comments. [1] https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250325101807.2202758-2-guomin.chen@cixtech.com/#3486864
On 15/04/2025 09:27, Peter Chen wrote: > From: Guomin Chen <Guomin.Chen@cixtech.com> > > Add a dt-binding for the Cixtech Mailbox Controller. > > Reviewed-by: Peter Chen <peter.chen@cixtech.com> > Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com> > Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml b/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml new file mode 100644 index 000000000000..216186f7cc4d --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/cix,sky1-mbox.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/cix,sky1-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cixtech mailbox controller + +maintainers: + - Guomin Chen <Guomin.Chen@cixtech.com> + +description: + The Cixtech mailbox controller, used in the Cixtech Sky1 SoC, + is used for message transmission between multiple processors + within the SoC, such as the AP, PM, audio DSP, SensorHub MCU, + and others + + Each Cixtech mailbox controller is unidirectional, so they are + typically used in pairs-one for receiving and one for transmitting. + + Each Cixtech mailbox supports 11 channels with different transmission modes + channel 0-7 - Fast channel with 32bit transmit register and IRQ support + channel 8 - Doorbell mode,using the mailbox as an interrupt-generating + mechanism. + channel 9 - Fifo based channel with 32*32bit depth fifo and IRQ support + channel 10 - Reg based channel with 32*32bit transmit register and + Doorbell+transmit acknowledgment IRQ support + +properties: + compatible: + const: cix,sky1-mbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#mbox-cells": + const: 1 + + cix,mbox-dir: + $ref: /schemas/types.yaml#/definitions/string + description: Direction of the mailbox relative to the AP + enum: [tx, rx] + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + - cix,mbox-dir + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mbox_ap2pm: mailbox@30000000 { + compatible = "cix,sky1-mbox"; + reg = <0 0x30000000 0 0x10000>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <1>; + cix,mbox-dir = "tx"; + }; + };