| Message ID | 1542783402-112482-1-git-send-email-chi-hsien.lin@cypress.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | brcmfmac: chip related changes | expand |
Chi-Hsien Lin <Chi-Hsien.Lin@cypress.com> writes: > This patch series includes various chip-related changes: > * 43012 support > * 4373 saverestore support > * SDIO bus settings > * 4354 raw chipid > > Changelog: > V3: > - Update comments for patch 3. > - Add defines for sr_control0 register bits in patch 7. > V2: > - Update commit message for patch 1. > - Update comments for patch 2. > - Remove CY_4373_F1_MESBUSYCTRL from patch 3. > - Collapse patch 6 (43102 sr support) in 4 (43012 support). Add helper functions. > - Remove sr_eng_en variable from patch 8. > - Collapse patch 10 and 11 in 9 (sdio_aos disable). As you submitted v4 an hour later I assume this one was a mistake and I'll drop it.
On 11/21/2018 11:33, Kalle Valo wrote: > Chi-Hsien Lin <Chi-Hsien.Lin@cypress.com> writes: > >> This patch series includes various chip-related changes: >> * 43012 support >> * 4373 saverestore support >> * SDIO bus settings >> * 4354 raw chipid >> >> Changelog: >> V3: >> - Update comments for patch 3. >> - Add defines for sr_control0 register bits in patch 7. >> V2: >> - Update commit message for patch 1. >> - Update comments for patch 2. >> - Remove CY_4373_F1_MESBUSYCTRL from patch 3. >> - Collapse patch 6 (43102 sr support) in 4 (43012 support). Add helper functions. >> - Remove sr_eng_en variable from patch 8. >> - Collapse patch 10 and 11 in 9 (sdio_aos disable). > > As you submitted v4 an hour later I assume this one was a mistake and > I'll drop it. Yes, this one is a mistake. Thanks for handling it. > > -- > Kalle Valo > > > ---------- > > You're receiving this message because you're a member of the brcm80211-dev-list group. > . >
This patch series includes various chip-related changes: * 43012 support * 4373 saverestore support * SDIO bus settings * 4354 raw chipid Changelog: V3: - Update comments for patch 3. - Add defines for sr_control0 register bits in patch 7. V2: - Update commit message for patch 1. - Update comments for patch 2. - Remove CY_4373_F1_MESBUSYCTRL from patch 3. - Collapse patch 6 (43102 sr support) in 4 (43012 support). Add helper functions. - Remove sr_eng_en variable from patch 8. - Collapse patch 10 and 11 in 9 (sdio_aos disable). Chi-Hsien Lin (3): brcmfmac: add support for CYW43012 SDIO chipset brcmfmac: allow GCI core enumuration brcmfmac: 4373 save-restore support Madhan Mohan R (1): brcmfmac: set SDIO F1 MesBusyCtrl for CYW4373 Naveen Gupta (1): brcmfmac: update 43012 F2 watermark setting to fix DMA Error during UDP RX Traffic Winnie Chang (1): brcmfmac: add 4354 raw pcie device id Wright Feng (2): brcmfmac: set F2 watermark to 256 for 4373 brcmfmac: disable command decode in sdio_aos .../wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c | 1 + .../wireless/broadcom/brcm80211/brcmfmac/chip.c | 33 ++++-- .../wireless/broadcom/brcm80211/brcmfmac/pcie.c | 1 + .../wireless/broadcom/brcm80211/brcmfmac/sdio.c | 119 ++++++++++++++++++--- .../wireless/broadcom/brcm80211/brcmfmac/sdio.h | 9 +- .../broadcom/brcm80211/include/brcm_hw_ids.h | 2 + .../broadcom/brcm80211/include/chipcommon.h | 25 +++++ include/linux/mmc/sdio_ids.h | 1 + 8 files changed, 169 insertions(+), 22 deletions(-)