diff mbox series

[v3,2/3] brcmfmac: Add support for BCM4377 on Apple hardware.

Message ID 0F1947F9-0836-43A9-B58A-2EF561CEC7B7@live.com (mailing list archive)
State Changes Requested
Delegated to: Kalle Valo
Headers show
Series [v3,1/3] brcmfmac: Add support for BCM4378 on Apple hardware (with their special OTP). | expand

Commit Message

Aditya Garg Nov. 3, 2021, 4:32 a.m. UTC
From: Aditya Garg <gargaditya08@live.com>

This patch adds required ids to support BCM4377 Chip found on certain Apple Macs with T2 chip.

V3- Make plain text

Based on original patch by Aun-Ali Zaidi <admin@kodeit.net>

Signed-off-by: Aditya Garg <gargaditya08@live.com>
---
 .../broadcom/brcm80211/brcmfmac/chip.c        |  4 +++
 .../broadcom/brcm80211/brcmfmac/pcie.c        | 32 +++++++++++++++----
 .../broadcom/brcm80211/include/brcm_hw_ids.h  |  2 ++
 3 files changed, 31 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
index 1bf0fa8f0..1e1b23bf4 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
@@ -727,6 +727,8 @@  static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci)
 		return 0x160000;
 	case CY_CC_43752_CHIP_ID:
 		return 0x170000;
+	case BRCM_CC_4377_CHIP_ID:
+		return 0x170000;
 	case BRCM_CC_4378_CHIP_ID:
 		return 0x352000;
 	default:
@@ -1428,6 +1430,8 @@  bool brcmf_chip_sr_capable(struct brcmf_chip *pub)
 		reg = chip->ops->read32(chip->ctx, addr);
 		return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
 			       PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
+	case BRCM_CC_4377_CHIP_ID:
+		return false;
 	case BRCM_CC_4378_CHIP_ID:
 		return false;
 	}
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
index ce8c552c6..6f0166b33 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
@@ -59,6 +59,7 @@  BRCMF_FW_DEF(4365C, "brcmfmac4365c-pcie");
 BRCMF_FW_DEF(4366B, "brcmfmac4366b-pcie");
 BRCMF_FW_DEF(4366C, "brcmfmac4366c-pcie");
 BRCMF_FW_DEF(4371, "brcmfmac4371-pcie");
+BRCMF_FW_DEF(4377, "brcmfmac4377-pcie");
 BRCMF_FW_DEF(4378, "brcmfmac4378-pcie");
 
 static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
@@ -81,6 +82,7 @@  static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
 	BRCMF_FW_ENTRY(BRCM_CC_43664_CHIP_ID, 0xFFFFFFF0, 4366C),
 	BRCMF_FW_ENTRY(BRCM_CC_43666_CHIP_ID, 0xFFFFFFF0, 4366C),
 	BRCMF_FW_ENTRY(BRCM_CC_4371_CHIP_ID, 0xFFFFFFFF, 4371),
+	BRCMF_FW_ENTRY(BRCM_CC_4377_CHIP_ID, 0xFFFFFFFF, 4377),
 	BRCMF_FW_ENTRY(BRCM_CC_4378_CHIP_ID, 0xFFFFFFFF, 4378),
 };
 
@@ -586,23 +588,33 @@  brcmf_pcie_reg_map(struct brcmf_pciedev_info *devinfo, u32 reg)
 {
 	switch(reg) {
 	case BRCMF_PCIE_PCIE2REG_INTMASK:
-		if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+		if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+			return BRCMF_PCIE_64_PCIE2REG_INTMASK;
+		else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 			return BRCMF_PCIE_64_PCIE2REG_INTMASK;
 		return reg;
 	case BRCMF_PCIE_PCIE2REG_MAILBOXINT:
-		if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+		if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+			return BRCMF_PCIE_64_PCIE2REG_MAILBOXINT;
+		else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 			return BRCMF_PCIE_64_PCIE2REG_MAILBOXINT;
 		return reg;
 	case BRCMF_PCIE_PCIE2REG_MAILBOXMASK:
-		if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+		if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+			return BRCMF_PCIE_64_PCIE2REG_MAILBOXMASK;
+		else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 			return BRCMF_PCIE_64_PCIE2REG_MAILBOXMASK;
 		return reg;
 	case BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_0:
-		if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+		if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+			return BRCMF_PCIE_64_PCIE2REG_H2D_MAILBOX_0;
+		else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 			return BRCMF_PCIE_64_PCIE2REG_H2D_MAILBOX_0;
 		return reg;
 	case BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_1:
-		if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+		if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+			return BRCMF_PCIE_64_PCIE2REG_H2D_MAILBOX_1;
+		else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 			return BRCMF_PCIE_64_PCIE2REG_H2D_MAILBOX_1;
 		return reg;
 	default:
@@ -1018,7 +1030,10 @@  static void brcmf_pcie_intr_disable(struct brcmf_pciedev_info *devinfo)
 
 static void brcmf_pcie_intr_enable(struct brcmf_pciedev_info *devinfo)
 {
-	if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+	if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+		brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_64_PCIE2REG_MAILBOXMASK,
+				       BRCMF_PCIE_64_MB_INT_D2H_DB);
+	else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 		brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_64_PCIE2REG_MAILBOXMASK,
 				       BRCMF_PCIE_64_MB_INT_D2H_DB);
 	else
@@ -1053,7 +1068,9 @@  static irqreturn_t brcmf_pcie_isr_thread(int irq, void *arg)
 	struct brcmf_pciedev_info *devinfo = (struct brcmf_pciedev_info *)arg;
 	u32 status, mask;
 
-	if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
+	if(devinfo->ci->chip == BRCM_CC_4377_CHIP_ID)
+		mask = BRCMF_PCIE_64_MB_INT_D2H_DB;
+	else if(devinfo->ci->chip == BRCM_CC_4378_CHIP_ID)
 		mask = BRCMF_PCIE_64_MB_INT_D2H_DB;
 	else
 		mask = BRCMF_PCIE_MB_INT_D2H_DB;
@@ -2363,6 +2380,7 @@  static const struct pci_device_id brcmf_pcie_devid_table[] = {
 	BRCMF_PCIE_DEVICE(BRCM_PCIE_4366_2G_DEVICE_ID),
 	BRCMF_PCIE_DEVICE(BRCM_PCIE_4366_5G_DEVICE_ID),
 	BRCMF_PCIE_DEVICE(BRCM_PCIE_4371_DEVICE_ID),
+	BRCMF_PCIE_DEVICE(BRCM_PCIE_4377_DEVICE_ID),
 	BRCMF_PCIE_DEVICE(BRCM_PCIE_4378_DEVICE_ID),
 	{ /* end: all zeroes */ }
 };
diff --git a/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h b/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h
index 242df778f..eb3f361a2 100644
--- a/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h
+++ b/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h
@@ -50,6 +50,7 @@ 
 #define BRCM_CC_43664_CHIP_ID		43664
 #define BRCM_CC_43666_CHIP_ID		43666
 #define BRCM_CC_4371_CHIP_ID		0x4371
+#define BRCM_CC_4377_CHIP_ID		0x4377
 #define BRCM_CC_4378_CHIP_ID		0x4378
 #define CY_CC_4373_CHIP_ID		0x4373
 #define CY_CC_43012_CHIP_ID		43012
@@ -85,6 +86,7 @@ 
 #define BRCM_PCIE_4366_2G_DEVICE_ID	0x43c4
 #define BRCM_PCIE_4366_5G_DEVICE_ID	0x43c5
 #define BRCM_PCIE_4371_DEVICE_ID	0x440d
+#define BRCM_PCIE_4377_DEVICE_ID	0x4488
 #define BRCM_PCIE_4378_DEVICE_ID	0x4425