@@ -815,6 +815,7 @@ static void ath9k_olc_temp_compensation(struct ath_hw *ah)
static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
{
+ struct ath_common *common = ath9k_hw_common(ah);
u32 regVal;
unsigned int i;
u32 regList [][2] = {
@@ -828,6 +829,8 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
{ 0x7828, 0 } ,
};
+ ath_print(common, ATH_DBG_CALIBRATE, "Running PA Calibration\n");
+
for (i = 0; i < ARRAY_SIZE(regList); i++)
regList[i][1] = REG_READ(ah, regList[i][0]);
@@ -1240,7 +1240,7 @@ void ath9k_hw_deinit(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
- if (common->state <= ATH_HW_INITIALIZED)
+ if (common->state < ATH_HW_INITIALIZED)
goto free_hw;
if (!AR_SREV_9100(ah))
@@ -1251,8 +1251,6 @@ void ath9k_hw_deinit(struct ath_hw *ah)
free_hw:
if (!AR_SREV_9280_10_OR_LATER(ah))
ath9k_hw_rf_free_ext_banks(ah);
- kfree(ah);
- ah = NULL;
}
EXPORT_SYMBOL(ath9k_hw_deinit);
@@ -1296,6 +1294,9 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
val = REG_READ(ah, AR_PCU_MISC_MODE2) &
(~AR_PCU_MISC_MODE2_HWWAR1);
+ if (!AR_SREV_9271(ah))
+ val &= ~AR_PCU_MISC_MODE2_HWWAR1;
+
if (AR_SREV_9287_10_OR_LATER(ah))
val = val & (~AR_PCU_MISC_MODE2_HWWAR2);
@@ -1428,7 +1429,10 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
return -EINVAL;
}
+ /* Set correct baseband to analog shift setting to access analog chips */
REG_WRITE(ah, AR_PHY(0), 0x00000007);
+
+ /* Write ADDAC shifts */
REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
ah->eep_ops->set_addac(ah, chan);
@@ -1440,9 +1444,11 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
sizeof(u32) * ah->iniAddac.ia_rows *
ah->iniAddac.ia_columns;
+ /* For AR5416 2.0/2.1 */
memcpy(ah->addac5416_21,
ah->iniAddac.ia_array, addacSize);
+ /* override CLKDRV value at [row, column] = [31, 1] */
(ah->addac5416_21)[31 * ah->iniAddac.ia_columns + 1] = 0;
temp.ia_array = ah->addac5416_21;
@@ -1474,6 +1480,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
AR_SREV_9287_10_OR_LATER(ah))
REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
+ /* Write common array parameters */
for (i = 0; i < ah->iniCommon.ia_rows; i++) {
u32 reg = INI_RA(&ah->iniCommon, i, 0);
u32 val = INI_RA(&ah->iniCommon, i, 1);
@@ -1488,11 +1495,15 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
DO_DELAY(regWrites);
}
- ath9k_hw_write_regs(ah, freqIndex, regWrites);
-
- if (AR_SREV_9271_10(ah))
- REG_WRITE_ARRAY(&ah->iniModes_9271_1_0_only,
+ if (AR_SREV_9271(ah) && (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1)) {
+ REG_WRITE_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
modesIndex, regWrites);
+ } else {
+ REG_WRITE_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
+ modesIndex, regWrites);
+ }
+
+ ath9k_hw_write_regs(ah, freqIndex, regWrites);
if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
@@ -1506,6 +1517,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
if (OLC_FOR_AR9280_20_LATER)
ath9k_olc_init(ah);
+ /* Set TX power */
ah->eep_ops->set_txpower(ah, chan,
ath9k_regd_get_ctl(regulatory, chan),
channel->max_antenna_gain * 2,
@@ -1513,6 +1525,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
min((u32) MAX_RATE_POWER,
(u32) regulatory->power_limit));
+ /* Write analog registers */
if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
"ar5416SetRfRegs failed\n");
@@ -758,6 +758,9 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
tasklet_kill(&sc->intr_tq);
tasklet_kill(&sc->bcon_tasklet);
+
+ kfree(sc->sc_ah);
+ sc->sc_ah = NULL;
}
void ath9k_deinit_device(struct ath_softc *sc)
@@ -839,8 +839,6 @@ int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
struct ath_common *common = ath9k_hw_common(ah);
- BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
-
ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
@@ -870,8 +868,6 @@ ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
bank = NULL; \
} while (0);
- BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
-
ATH_FREE_BANK(ah->analogBank0Data);
ATH_FREE_BANK(ah->analogBank1Data);
ATH_FREE_BANK(ah->analogBank2Data);