diff mbox

ssb: add delay after PCI reset to fix SoC reboots

Message ID 1428251967-18066-1-git-send-email-zajec5@gmail.com (mailing list archive)
State Accepted
Delegated to: Kalle Valo
Headers show

Commit Message

Rafał Miłecki April 5, 2015, 4:39 p.m. UTC 
Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
---
Kalle: this bug is there since ever, I guess this patch can be queued for next.
---
 drivers/ssb/driver_pcicore.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Kalle Valo April 7, 2015, 5:18 p.m. UTC | #1 
Rafa? Mi?ecki <zajec5@gmail.com> writes:

> Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
> ---
> Kalle: this bug is there since ever, I guess this patch can be queued for next.

Thanks, applied.
diff mbox

Patch

diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index d75b72b..15a7ee3 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -357,6 +357,15 @@  static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
 	pcicore_write32(pc, SSB_PCICORE_SBTOPCI2,
 			SSB_PCICORE_SBTOPCI_MEM | SSB_PCI_DMA);
 
+	/*
+	 * Accessing PCI config without a proper delay after devices reset (not
+	 * GPIO reset) was causing reboots on WRT300N v1.0.
+	 * Tested delay 850 us lowered reboot chance to 50-80%, 1000 us fixed it
+	 * completely. Flushing all writes was also tested but with no luck.
+	 */
+	if (pc->dev->bus->chip_id == 0x4704)
+		usleep_range(1000, 2000);
+
 	/* Enable PCI bridge BAR0 prefetch and burst */
 	val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 	ssb_extpci_write_config(pc, 0, 0, 0, PCI_COMMAND, &val, 2);