| Message ID | 1497921220-12940-2-git-send-email-miaoqing@codeaurora.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | bde717ab473668377fc65872398a102d40cb2d58 |
| Delegated to: | Kalle Valo |
| Headers | show |
On Dienstag, 20. Juni 2017 09:13:40 CEST miaoqing@codeaurora.org wrote: > From: Miaoqing Pan <miaoqing@codeaurora.org> > > The hard coded register 0x9864 and 0x9924 are invalid > for ar9300 chips. [...] > - REG_SET_BIT(ah, 0x9864, 0x7f000); > - REG_SET_BIT(ah, 0x9924, 0x7f00fe); Sorry that this messages comes so later after the patch was accepted. But what were these things expected to do? My guess is that 0x9864 is AR_PHY_CCA and the other one is something else (AR_PHY_TIMING5?). But yes, these would be ar9002 and not AR9003. What are the problems that we would expect when the CCA threshold and the CYCPWR threshold are no longer be set to the highest possible value? Are we now expecting that the device is not transmitting at 99% when it sees other signals? Btw. why are you writing that ar9300 chips don't have this? It looks to me like the original code was taken from QCA's 9300 code [1]. Was it always broken in the AR9300 hal and how was it now fixed with with the newer HALs? Could it be that newer chips just have it mapped to a different location? AGC on the 9300 seems to be at 0x9e00 and maybe the cca register should have been 0x9e1c (AR_PHY_CCA_0) and should be set to AR_PHY_CCA_THRESH62? And there is also a AR_PHY_TIMING5 (0x9810) which might have to be set to AR_PHY_TIMING5_CYCPWR_THR1 | AR_PHY_TIMING5_CYCPWR_THR1A. Of course, I have absolutely no idea whether these registers actually control the same thing and whether the settings are correct. Kind regards, Sven [1] https://github.com/freebsd/freebsd/blob/386ddae58459341ec567604707805814a2128a57/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_tx99_tgt.c#L502
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index ae304355..fe5102c 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -1821,8 +1821,6 @@ static void ar9003_hw_spectral_scan_wait(struct ath_hw *ah) static void ar9003_hw_tx99_start(struct ath_hw *ah, u32 qnum) { REG_SET_BIT(ah, AR_PHY_TEST, PHY_AGC_CLR); - REG_SET_BIT(ah, 0x9864, 0x7f000); - REG_SET_BIT(ah, 0x9924, 0x7f00fe); REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS); REG_WRITE(ah, AR_CR, AR_CR_RXD); REG_WRITE(ah, AR_DLCL_IFS(qnum), 0);