Message ID | 1538647495-15213-3-git-send-email-sgruszka@redhat.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Kalle Valo |
Headers | show |
Series | mt76x0: phy/rf fixups for PCIe | expand |
> > PCIe version don't use MCU for RF regsisters access. We need > to correct RF CSR method to support up to 127 RF registers. > > Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> > --- > drivers/net/wireless/mediatek/mt76/mt76x0/phy.c | 6 ++---- > drivers/net/wireless/mediatek/mt76/mt76x02_regs.h | 4 ++-- > 2 files changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c > index cbbfd5193d9c..da4569f00794 100644 > --- a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c > +++ b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c > @@ -37,7 +37,7 @@ > bank = MT_RF_BANK(offset); > reg = MT_RF_REG(offset); > > - if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8) > + if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8) I guess there is a typo here, it should be: if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank > 8)) > return -EINVAL; > > mutex_lock(&dev->phy_mutex); > @@ -76,7 +76,7 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) > bank = MT_RF_BANK(offset); > reg = MT_RF_REG(offset); > > - if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8) > + if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8) same as above Regards, Lorenzo > return -EINVAL; > > mutex_lock(&dev->phy_mutex); > @@ -119,7 +119,6 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) > > return mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, &pair, 1); > } else { > - WARN_ON_ONCE(1); > return mt76x0_rf_csr_wr(dev, offset, val); > } > } > @@ -138,7 +137,6 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) > ret = mt76_rd_rp(dev, MT_MCU_MEMMAP_RF, &pair, 1); > val = pair.value; > } else { > - WARN_ON_ONCE(1); > ret = val = mt76x0_rf_csr_rr(dev, offset); > } > > diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h > index 24d1e6d747dd..f7de77d09d28 100644 > --- a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h > +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h > @@ -205,8 +205,8 @@ > #define MT_TXQ_STA 0x0434 > #define MT_RF_CSR_CFG 0x0500 > #define MT_RF_CSR_CFG_DATA GENMASK(7, 0) > -#define MT_RF_CSR_CFG_REG_ID GENMASK(13, 8) > -#define MT_RF_CSR_CFG_REG_BANK GENMASK(17, 14) > +#define MT_RF_CSR_CFG_REG_ID GENMASK(14, 8) > +#define MT_RF_CSR_CFG_REG_BANK GENMASK(17, 15) > #define MT_RF_CSR_CFG_WR BIT(30) > #define MT_RF_CSR_CFG_KICK BIT(31) > > -- > 1.9.3 >
On 2018-10-06 10:25, Lorenzo Bianconi wrote: >> >> PCIe version don't use MCU for RF regsisters access. We need >> to correct RF CSR method to support up to 127 RF registers. >> >> Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> >> --- >> drivers/net/wireless/mediatek/mt76/mt76x0/phy.c | 6 ++---- >> drivers/net/wireless/mediatek/mt76/mt76x02_regs.h | 4 ++-- >> 2 files changed, 4 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c >> index cbbfd5193d9c..da4569f00794 100644 >> --- a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c >> +++ b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c >> @@ -37,7 +37,7 @@ >> bank = MT_RF_BANK(offset); >> reg = MT_RF_REG(offset); >> >> - if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8) >> + if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8) > > I guess there is a typo here, it should be: > > if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank > 8)) It's not a regression, since that part is the same as before the patch. Feel free to send a separate fix. - Felix
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c index cbbfd5193d9c..da4569f00794 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c @@ -37,7 +37,7 @@ bank = MT_RF_BANK(offset); reg = MT_RF_REG(offset); - if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8) + if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8) return -EINVAL; mutex_lock(&dev->phy_mutex); @@ -76,7 +76,7 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) bank = MT_RF_BANK(offset); reg = MT_RF_REG(offset); - if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8) + if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8) return -EINVAL; mutex_lock(&dev->phy_mutex); @@ -119,7 +119,6 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) return mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, &pair, 1); } else { - WARN_ON_ONCE(1); return mt76x0_rf_csr_wr(dev, offset, val); } } @@ -138,7 +137,6 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) ret = mt76_rd_rp(dev, MT_MCU_MEMMAP_RF, &pair, 1); val = pair.value; } else { - WARN_ON_ONCE(1); ret = val = mt76x0_rf_csr_rr(dev, offset); } diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h index 24d1e6d747dd..f7de77d09d28 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h @@ -205,8 +205,8 @@ #define MT_TXQ_STA 0x0434 #define MT_RF_CSR_CFG 0x0500 #define MT_RF_CSR_CFG_DATA GENMASK(7, 0) -#define MT_RF_CSR_CFG_REG_ID GENMASK(13, 8) -#define MT_RF_CSR_CFG_REG_BANK GENMASK(17, 14) +#define MT_RF_CSR_CFG_REG_ID GENMASK(14, 8) +#define MT_RF_CSR_CFG_REG_BANK GENMASK(17, 15) #define MT_RF_CSR_CFG_WR BIT(30) #define MT_RF_CSR_CFG_KICK BIT(31)
PCIe version don't use MCU for RF regsisters access. We need to correct RF CSR method to support up to 127 RF registers. Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> --- drivers/net/wireless/mediatek/mt76/mt76x0/phy.c | 6 ++---- drivers/net/wireless/mediatek/mt76/mt76x02_regs.h | 4 ++-- 2 files changed, 4 insertions(+), 6 deletions(-)