@@ -1,6 +1,7 @@
obj-$(CONFIG_RTW88_CORE) += rtw88.o
rtw88-y += main.o \
mac80211.o \
+ util.o \
debug.o \
tx.o \
rx.o \
@@ -304,35 +304,6 @@ void rtw_mac_power_off(struct rtw_dev *rtwdev)
rtw_mac_power_switch(rtwdev, false);
}
-static void
-restore_mac_reg(struct rtw_dev *rtwdev, struct rtw_backup_info *bckp, u32 num)
-{
- u8 len;
- u32 reg;
- u32 val;
- int i;
-
- for (i = 0; i < num; i++, bckp++) {
- len = bckp->len;
- reg = bckp->reg;
- val = bckp->val;
-
- switch (len) {
- case 1:
- rtw_write8(rtwdev, reg, (u8)val);
- break;
- case 2:
- rtw_write16(rtwdev, reg, (u16)val);
- break;
- case 4:
- rtw_write32(rtwdev, reg, (u32)val);
- break;
- default:
- break;
- }
- }
-}
-
static bool check_firmware_size(const u8 *data, u32 size)
{
u32 dmem_size;
@@ -355,28 +326,6 @@ static bool check_firmware_size(const u8 *data, u32 size)
return true;
}
-static bool ltecoex_read_reg(struct rtw_dev *rtwdev, u16 offset, u32 *val)
-{
- if (!check_hw_ready(rtwdev, LTECOEX_ACCESS_CTRL, LTECOEX_READY, 1))
- return false;
-
- rtw_write32(rtwdev, LTECOEX_ACCESS_CTRL, 0x800F0000 | offset);
- *val = rtw_read32(rtwdev, LTECOEX_READ_DATA);
-
- return true;
-}
-
-static bool ltecoex_reg_write(struct rtw_dev *rtwdev, u16 offset, u32 value)
-{
- if (!check_hw_ready(rtwdev, LTECOEX_ACCESS_CTRL, LTECOEX_READY, 1))
- return false;
-
- rtw_write32(rtwdev, LTECOEX_WRITE_DATA, value);
- rtw_write32(rtwdev, LTECOEX_ACCESS_CTRL, 0xC00F0000 | offset);
-
- return true;
-}
-
static void wlan_cpu_enable(struct rtw_dev *rtwdev, bool enable)
{
if (enable) {
@@ -459,7 +408,7 @@ static void download_firmware_reg_restore(struct rtw_dev *rtwdev,
struct rtw_backup_info *bckp,
u8 bckp_num)
{
- restore_mac_reg(rtwdev, bckp, bckp_num);
+ rtw_restore_reg(rtwdev, bckp, bckp_num);
}
#define TX_DESC_SIZE 48
@@ -12,6 +12,8 @@
#include <linux/bitops.h>
#include <linux/bitfield.h>
+#include "util.h"
+
#define RTW_MAX_MAC_ID_NUM 32
#define RTW_MAX_SEC_CAM_NUM 32
@@ -1079,47 +1081,13 @@ static inline void rtw_flag_set(struct rtw_dev *rtwdev, enum rtw_flags flag)
set_bit(flag, rtwdev->flags);
}
-static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr)
-{
- __le16 fc = hdr->frame_control;
- u8 *bssid;
-
- if (ieee80211_has_tods(fc))
- bssid = hdr->addr1;
- else if (ieee80211_has_fromds(fc))
- bssid = hdr->addr2;
- else
- bssid = hdr->addr3;
-
- return bssid;
-}
-
-static inline bool check_hw_ready(struct rtw_dev *rtwdev,
- u32 addr, u32 mask, u32 target)
-{
- u32 cnt;
-
- for (cnt = 0; cnt < 1000; cnt++) {
- if (rtw_read32_mask(rtwdev, addr, mask) == target)
- return true;
-
- udelay(10);
- }
-
- return false;
-}
-
-#define rtw_iterate_vifs(rtwdev, iterator, data) \
- ieee80211_iterate_active_interfaces(rtwdev->hw, \
- IEEE80211_IFACE_ITER_NORMAL, iterator, data)
-#define rtw_iterate_vifs_atomic(rtwdev, iterator, data) \
- ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, \
- IEEE80211_IFACE_ITER_NORMAL, iterator, data)
-#define rtw_iterate_stas_atomic(rtwdev, iterator, data) \
- ieee80211_iterate_stations_atomic(rtwdev->hw, iterator, data)
-
void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
struct rtw_channel_params *ch_param);
+bool check_hw_ready(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 target);
+bool ltecoex_read_reg(struct rtw_dev *rtwdev, u16 offset, u32 *val);
+bool ltecoex_reg_write(struct rtw_dev *rtwdev, u16 offset, u32 value);
+void rtw_restore_reg(struct rtw_dev *rtwdev,
+ struct rtw_backup_info *bckp, u32 num);
void rtw_set_channel(struct rtw_dev *rtwdev);
void rtw_vif_port_config(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
u32 config);
new file mode 100644
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2018 Realtek Corporation.
+ */
+
+#include "main.h"
+#include "util.h"
+#include "reg.h"
+
+bool check_hw_ready(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 target)
+{
+ u32 cnt;
+
+ for (cnt = 0; cnt < 1000; cnt++) {
+ if (rtw_read32_mask(rtwdev, addr, mask) == target)
+ return true;
+
+ udelay(10);
+ }
+
+ return false;
+}
+
+bool ltecoex_read_reg(struct rtw_dev *rtwdev, u16 offset, u32 *val)
+{
+ if (!check_hw_ready(rtwdev, LTECOEX_ACCESS_CTRL, LTECOEX_READY, 1))
+ return false;
+
+ rtw_write32(rtwdev, LTECOEX_ACCESS_CTRL, 0x800F0000 | offset);
+ *val = rtw_read32(rtwdev, LTECOEX_READ_DATA);
+
+ return true;
+}
+
+bool ltecoex_reg_write(struct rtw_dev *rtwdev, u16 offset, u32 value)
+{
+ if (!check_hw_ready(rtwdev, LTECOEX_ACCESS_CTRL, LTECOEX_READY, 1))
+ return false;
+
+ rtw_write32(rtwdev, LTECOEX_WRITE_DATA, value);
+ rtw_write32(rtwdev, LTECOEX_ACCESS_CTRL, 0xC00F0000 | offset);
+
+ return true;
+}
+
+void rtw_restore_reg(struct rtw_dev *rtwdev,
+ struct rtw_backup_info *bckp, u32 num)
+{
+ u8 len;
+ u32 reg;
+ u32 val;
+ int i;
+
+ for (i = 0; i < num; i++, bckp++) {
+ len = bckp->len;
+ reg = bckp->reg;
+ val = bckp->val;
+
+ switch (len) {
+ case 1:
+ rtw_write8(rtwdev, reg, (u8)val);
+ break;
+ case 2:
+ rtw_write16(rtwdev, reg, (u16)val);
+ break;
+ case 4:
+ rtw_write32(rtwdev, reg, (u32)val);
+ break;
+ default:
+ break;
+ }
+ }
+}
new file mode 100644
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2018 Realtek Corporation.
+ */
+
+#ifndef __RTW_UTIL_H__
+#define __RTW_UTIL_H__
+
+struct rtw_dev;
+
+#define rtw_iterate_vifs(rtwdev, iterator, data) \
+ ieee80211_iterate_active_interfaces(rtwdev->hw, \
+ IEEE80211_IFACE_ITER_NORMAL, iterator, data)
+#define rtw_iterate_vifs_atomic(rtwdev, iterator, data) \
+ ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, \
+ IEEE80211_IFACE_ITER_NORMAL, iterator, data)
+#define rtw_iterate_stas_atomic(rtwdev, iterator, data) \
+ ieee80211_iterate_stations_atomic(rtwdev->hw, iterator, data)
+
+static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr)
+{
+ __le16 fc = hdr->frame_control;
+ u8 *bssid;
+
+ if (ieee80211_has_tods(fc))
+ bssid = hdr->addr1;
+ else if (ieee80211_has_fromds(fc))
+ bssid = hdr->addr2;
+ else
+ bssid = hdr->addr3;
+
+ return bssid;
+}
+
+#endif