===================================================================
@@ -39,6 +39,10 @@
#define B43_MMIO_DMA4_IRQ_MASK 0x44
#define B43_MMIO_DMA5_REASON 0x48
#define B43_MMIO_DMA5_IRQ_MASK 0x4C
+#define B43_MMIO_DMA6_REASON 0x50
+#define B43_MMIO_DMA6_IRQ_MASK 0x54
+#define B43_MMIO_DMA7_REASON 0x58
+#define B43_MMIO_DMA7_IRQ_MASK 0x5C
#define B43_MMIO_MACCTL 0x120 /* MAC control */
#define B43_MMIO_MACCMD 0x124 /* MAC command */
#define B43_MMIO_GEN_IRQ_REASON 0x128
===================================================================
@@ -2880,6 +2880,10 @@ static int b43_chip_init(struct b43_wlde
b43_write32(dev, B43_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
+ b43_write32(dev, B43_MMIO_DMA6_IRQ_MASK, 0);
+ b43_write32(dev, B43_MMIO_DMA6_REASON, 0);
+ b43_write32(dev, B43_MMIO_DMA7_IRQ_MASK, 0);
+ b43_write32(dev, B43_MMIO_DMA7_REASON, 0);
value32 = ssb_read32(dev->dev, SSB_TMSLOW);
value32 |= 0x00100000;