@@ -1864,13 +1864,13 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
pCap->low_5ghz_chan = 4920;
pCap->high_5ghz_chan = 6100;
- pCap->hw_caps &= ~ATH9K_HW_CAP_CIPHER_CKIP;
- pCap->hw_caps |= ATH9K_HW_CAP_CIPHER_TKIP;
- pCap->hw_caps |= ATH9K_HW_CAP_CIPHER_AESCCM;
+ common->crypt_caps &= ~ATH_CRYPT_CAP_CIPHER_CKIP;
+ common->crypt_caps |= ATH_CRYPT_CAP_CIPHER_TKIP;
+ common->crypt_caps |= ATH_CRYPT_CAP_CIPHER_AESCCM;
- pCap->hw_caps &= ~ATH9K_HW_CAP_MIC_CKIP;
- pCap->hw_caps |= ATH9K_HW_CAP_MIC_TKIP;
- pCap->hw_caps |= ATH9K_HW_CAP_MIC_AESCCM;
+ common->crypt_caps &= ~ATH_CRYPT_CAP_MIC_CKIP;
+ common->crypt_caps |= ATH_CRYPT_CAP_MIC_TKIP;
+ common->crypt_caps |= ATH_CRYPT_CAP_MIC_AESCCM;
if (ah->config.ht_enable)
pCap->hw_caps |= ATH9K_HW_CAP_HT;
@@ -181,29 +181,23 @@ enum wireless_mode {
};
enum ath9k_hw_caps {
- ATH9K_HW_CAP_MIC_AESCCM = BIT(0),
- ATH9K_HW_CAP_MIC_CKIP = BIT(1),
- ATH9K_HW_CAP_MIC_TKIP = BIT(2),
- ATH9K_HW_CAP_CIPHER_AESCCM = BIT(3),
- ATH9K_HW_CAP_CIPHER_CKIP = BIT(4),
- ATH9K_HW_CAP_CIPHER_TKIP = BIT(5),
- ATH9K_HW_CAP_VEOL = BIT(6),
- ATH9K_HW_CAP_BSSIDMASK = BIT(7),
- ATH9K_HW_CAP_MCAST_KEYSEARCH = BIT(8),
- ATH9K_HW_CAP_HT = BIT(9),
- ATH9K_HW_CAP_GTT = BIT(10),
- ATH9K_HW_CAP_FASTCC = BIT(11),
- ATH9K_HW_CAP_RFSILENT = BIT(12),
- ATH9K_HW_CAP_CST = BIT(13),
- ATH9K_HW_CAP_ENHANCEDPM = BIT(14),
- ATH9K_HW_CAP_AUTOSLEEP = BIT(15),
- ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(16),
- ATH9K_HW_CAP_EDMA = BIT(17),
- ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18),
- ATH9K_HW_CAP_LDPC = BIT(19),
- ATH9K_HW_CAP_FASTCLOCK = BIT(20),
- ATH9K_HW_CAP_SGI_20 = BIT(21),
- ATH9K_HW_CAP_PAPRD = BIT(22),
+ ATH9K_HW_CAP_VEOL = BIT(0),
+ ATH9K_HW_CAP_BSSIDMASK = BIT(1),
+ ATH9K_HW_CAP_MCAST_KEYSEARCH = BIT(2),
+ ATH9K_HW_CAP_HT = BIT(3),
+ ATH9K_HW_CAP_GTT = BIT(4),
+ ATH9K_HW_CAP_FASTCC = BIT(5),
+ ATH9K_HW_CAP_RFSILENT = BIT(6),
+ ATH9K_HW_CAP_CST = BIT(7),
+ ATH9K_HW_CAP_ENHANCEDPM = BIT(8),
+ ATH9K_HW_CAP_AUTOSLEEP = BIT(9),
+ ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(10),
+ ATH9K_HW_CAP_EDMA = BIT(11),
+ ATH9K_HW_CAP_RAC_SUPPORTED = BIT(12),
+ ATH9K_HW_CAP_LDPC = BIT(13),
+ ATH9K_HW_CAP_FASTCLOCK = BIT(14),
+ ATH9K_HW_CAP_SGI_20 = BIT(15),
+ ATH9K_HW_CAP_PAPRD = BIT(16),
};
struct ath9k_hw_capabilities {