@@ -156,6 +156,8 @@ static struct carl9170_tx_status *wlan_get_tx_status_buffer(void)
return tmp;
}
+static unsigned int comp_tsf;
+
/* generate _aggregated_ tx_status for the host */
static void wlan_tx_complete(struct carl9170_tx_superframe *super,
bool txs)
@@ -178,6 +180,9 @@ static void wlan_tx_complete(struct carl9170_tx_superframe *super,
status->rix = super->s.rix;
status->tries = super->s.cnt;
status->success = (txs) ? 1 : 0;
+
+ /* jup, no fancy rollover stuff */
+ status->duration = comp_tsf - super->s.tsfl;
}
static bool wlan_tx_consume_retry(struct carl9170_tx_superframe *super)
@@ -253,6 +258,8 @@ static void __wlan_tx(struct dma_desc *desc)
BUG_ON(fw.phy.psm.state != CARL9170_PSM_WAKE);
# endif /* CONFIG_CARL9170FW_DEBUG && CONFIG_CARL9170FW_PSM */
+ super->s.tsfl = get_clock_counter();
+
/* insert desc into the right queue */
dma_put(&fw.wlan.tx_queue[queue], desc);
wlan_trigger(BIT(queue));
@@ -328,6 +335,8 @@ static bool wlan_tx_status(struct dma_queue *queue,
/* demise descriptor ownership back to the hardware */
dma_rearm(desc);
+ super->s.tsfl = get_clock_counter();
+
/*
* And this will get the queue going again.
* To understand why: you have to get the HW
@@ -399,6 +408,8 @@ static void handle_tx_completion(void)
struct dma_desc *desc;
unsigned int i;
+ comp_tsf = get_clock_counter();
+
for (i = 0; i < __AR9170_NUM_TX_QUEUES; i++) {
__while_desc_bits(desc, &fw.wlan.tx_queue[i], AR9170_OWN_BITS_SW) {
if (!wlan_tx_status(&fw.wlan.tx_queue[i], desc)) {
@@ -215,6 +215,8 @@ struct carl9170_tx_status {
u8 rix:2;
u8 tries:3;
u8 success:1;
+
+ __le32 duration;
} __packed;
struct _carl9170_tx_status {
/*
@@ -223,8 +225,10 @@ struct _carl9170_tx_status {
u8 cookie;
u8 info;
+
+ __le32 duration;
} __packed;
-#define CARL9170_TX_STATUS_SIZE 2
+#define CARL9170_TX_STATUS_SIZE 6
#define CARL9170_RSP_TX_STATUS_NUM (CARL9170_MAX_CMD_PAYLOAD_LEN / \
sizeof(struct _carl9170_tx_status))
@@ -254,6 +254,7 @@ struct carl9170_tx_superdesc {
u8 fill_in_tsf:1;
u8 cab:1;
u8 padding2;
+ u32 tsfl;
struct ar9170_tx_rate_info ri[CARL9170_TX_MAX_RATES];
struct ar9170_tx_hw_phy_control rr[CARL9170_TX_MAX_RETRY_RATES];
} __packed;
@@ -317,6 +318,7 @@ struct _carl9170_tx_superdesc {
u8 ampdu_settings;
u8 misc;
u8 padding;
+ __le32 tsfl;
u8 ri[CARL9170_TX_MAX_RATES];
__le32 rr[CARL9170_TX_MAX_RETRY_RATES];
} __packed;
@@ -327,7 +329,7 @@ struct _carl9170_tx_superframe {
u8 frame_data[0];
} __packed;
-#define CARL9170_TX_SUPERDESC_LEN 24
+#define CARL9170_TX_SUPERDESC_LEN 28
#define AR9170_TX_HWDESC_LEN 8
#define AR9170_TX_SUPERFRAME_LEN (CARL9170_TX_HWDESC_LEN + \
AR9170_TX_SUPERDESC_LEN)