| Message ID | 20200810085832.65662-5-nbd@nbd.name (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Felix Fietkau |
| Headers | show |
| Series | [1/6] mt76: set interrupt mask register to 0 before requesting irq | expand |
diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/dma.c b/drivers/net/wireless/mediatek/mt76/mt7615/dma.c index c876eb1e1681..3b375fdf31b8 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/dma.c @@ -117,14 +117,12 @@ static int mt7615_poll_tx(struct napi_struct *napi, int budget) mt7615_tx_cleanup(dev); - if (napi_complete_done(napi, 0)) - mt7615_irq_enable(dev, MT_INT_TX_DONE_ALL); - - mt7615_tx_cleanup(dev); - mt7615_pm_power_save_sched(dev); tasklet_schedule(&dev->mt76.tx_tasklet); + if (napi_complete_done(napi, 0)) + mt7615_irq_enable(dev, MT_INT_TX_DONE_ALL); + return 0; }
Fixes a race condition where multiple tx cleanup tasks could run in parallel Signed-off-by: Felix Fietkau <nbd@nbd.name> --- drivers/net/wireless/mediatek/mt76/mt7615/dma.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)